Power amplifier array with same type predistortion amplifier

• US 6,646,505 B2
• Filed: 03/26/2002
• Issued: 11/11/2003
• Est. Priority Date: 03/26/2002
• Status: Expired due to Fees

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Shaw, Michael, Anderson, Dale
• Primary Examiner(s): Shingleton, Michael B
• Application Number:
  US10/106,462
• Publication Number:
  US 20030184371A1
• Time in Patent Office: 595 Days
• Field of Search: 330/124.R, 330/144, 330/149, 330/295, 375/297, 455/63, 257/528
• US Class Current: 330/124.00R
• CPC Class Codes: H03F 1/3252 using multiple parallel paths between input and output H03F1/3258, H03F1/3282, H03F1/3294 take precedence
• CPC Class Codes: H03F 1/3276 using the nonlinearity inherent to components, e.g. a diode
• CPC Class Codes: H03F 3/602 Combinations of several amplifiers

Abstract

A power amplifier circuit (30, 60) improves the linearity of an amplified output signal. The power amplifier circuit (30, 60) includes an input (33, 63) for receiving a carrier signal (34, 64) and an array of combined amplifiers (32, 62) of a predetermined type for amplifying the carrier signal (34, 64). At least one amplifier (48, 78) of the predetermined type is located between the input (33, 63) and the array of combined amplifiers (32, 62) for amplifying the carrier signal (34, 64) to produce a predistorted carrier signal (34b1, 64b1) with a carrier signal component and a distortion component to condition the carrier signal (34, 64) for input into the array of combined amplifiers (32, 62), and specifically to compensate for nonlinearities produced by the array of combined amplifiers (32, 62).

Claims

1. A power amplifier circuit, comprising:

an input for receiving a carrier signal;

an array of combined amplifiers of a predetermined type for amplifying the carrier signal;

at least one amplifier of the predetermined type that is located between the input and the array of combined amplifiers for amplifying the carrier signal to produce a predistorted carrier signal to compensate for nonlinearities introduced by the array of combined amplifiers before the carrier signal is input into the array of combined amplifiers; and

a phase and gain adjuster for canceling a carrier signal component from the predistorted carrier signal and for inverting distortion caused by the at least one amplifier of the predetermined type to compensate for nonlinearities caused by the amplifier array.

2. The power amplifier circuit of claim 1, wherein the array of power amplifiers totals N in number, where N is a positive integer greater than 1.

3. The power amplifier circuit of claim 1, wherein all amplifiers in the array of combined amplifiers are combined in parallel with one another.

4. The power amplifier circuit of claim 1, wherein the array of combined amplifiers an array of discrete device amplifiers.

5. The power amplifier circuit of claim 1, wherein the array of combined amplifiers at least one high voltage LDMOS integrated circuit.

6. The power amplifier circuit of claim 1, wherein the at least one amplifier of the predetermined type increases efficiency and at least maintains linearity of an output of the array of combined amplifiers when compared to an output of the array of combined amplifiers without the at least one amplifier of the predetermined type that is located between the input and the array of combined amplifiers.

7. The power amplifier circuit of claim 1, further comprising an attenuator located between the input and the at least one amplifier of the predetermined type for attenuating the carrier signal before the carrier signal is predistorted by the at least one amplifier of the predetermined type.

8. The power amplifier circuit of claim 1, wherein the phase and gain adjuster further comprise:

a carrier cancellation device for canceling the carrier signal component from the predistorted carrier signal;

a phase adjuster for inverting a distortion signal component of the predistorted carrier signal output from the carrier cancellation device by 180° and

for subsequently outputting an inverted distortion signal; and

a combiner for combining the inverted distortion signal with a clean carrier signal component and for inputting a resulting carrier signal with inverted distortion into the array of combined amplifiers to improve linearity of an amplified carrier signal output produced by the array of combined amplifiers.

9. The power amplifier circuit of claim 8, wherein the carrier cancellation device comprises:

a first attenuator for reducing the predistorted carrier signal by a predetermined amount upon being output from the at least one amplifier of the predetermined type;

a second attenuator for adjusting the predistorted carrier signal prior to the predistorted carrier signal being input into the phase adjuster.

10. The power amplifier circuit of claim 1, further comprising:

a power splitter for splitting the carrier signal into first and second signal components on first and second signal paths;

an IQ adjuster for adjusting a phase and gain of the second signal component to produce a predistorted second signal component output from the at least one amplifier of the predetermined type;

a carrier cancellation combiner for combining the predistorted second signal component with the first signal component to cancel the carrier signal component from the predistorted second signal component;

an attenuator for attenuating the first signal component by a predetermined amount to produce an attenuated first signal component; and

a carrier reinsertion combiner for combining the attenuated first signal component with a distortion signal component output from the carrier cancellation combiner.

11. The power amplifier circuit of claim 10, wherein the carrier cancellation and carrier reinsertion combiners are Wilkinson combiners.

12. The power amplifier circuit of claim 10, further comprising a delay for delaying the first signal component prior to the first signal component being input into the carrier cancellation combiner to delay match the first and second signal components.

13. The power amplifier circuit of claim 1, wherein the at least one amplifier of the predetermined type and the array of combined amplifiers are implemented in one of a wireless communications base station and a wireless handset environment.

14. A power amplifier circuit, comprising:

a plurality of combined amplifiers for amplifying an input carrier signal;

at least one predistortion amplifier of a type identical to that of each of the plurality of combined amplifiers for predistorting the input carrier signal and thereby outputting a predistorted carrier signal for input into the plurality of combined amplifiers to improve linearity of an output of the plurality of combined amplifiers; and

a phase and gain adjuster for canceling a carrier signal component from the predistorted carrier signal and for inverting distortion caused by the at least one predistortion amplifier to compensate for nonlinearities caused by the amplifier array.

15. The power amplifier circuit of claim 14, wherein the plurality of combined amplifiers and the at least one predistortion amplifier each comprise at least one of a high voltage integrated circuit and a discrete device amplifier.

16. The power amplifier circuit of claim 14, wherein the at least one predistortion amplifier of a predetermined type enables the plurality of combined amplifiers to increase output power parameters while at least maintaining corresponding efficiency parameters.

17. The power amplifier circuit of claim 14, wherein the at least one predistortion amplifier of a predetermined type and the plurality of combined amplifiers are implemented in one of a wireless communications base station and a wireless handset environment.

18. A power amplifier circuit, comprising:

a plurality of combined amplifiers for amplifying an input carrier signal; and

at least one predistortion amplifier for predistorting an input signal to provide a predistorted carrier signal corresponding to the input carrier signal for input into the plurality of combined amplifiers to improve linearity of an output of the plurality of combined amplifiers, the predistortion amplifier of a type identical to that of each of the plurality of combined amplifiers with an input power level and using an amount of power that is the same as each of the combined amplifiers.

19. The power amplifier circuit of claim 18, further comprising a phase and gain adjuster for canceling a carrier signal component from the predistorted carrier signal and for inverting distortion caused by the at least one predistortion amplifier to compensate for nonlinearities caused by the plurality of combined amplifiers.

20. The power amplifier circuit of claim 18, wherein the at least one predistortion amplifier and the plurality of combined amplifiers are implemented in one of a wireless communications base station and a wireless handset.