Zero delay mask for galois LFSR

• US 6,647,051 B1
• Filed: 12/29/1999
• Issued: 11/11/2003
• Est. Priority Date: 12/29/1999
• Status: Expired due to Term

• Current Assignee: ST-Ericcson SA (Telefonaktiebolaget LM Ericsson)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Greenhoe, Daniel J.
• Primary Examiner(s): Bayard, Emmanuel
• Application Number:
  US09/474,303
• Time in Patent Office: 1,413 Days
• Field of Search: 375/141, 375/146, 375/140, 375/130, 375/265, 375/341, 375/372, 375/377, 708/250, 708/252, 708/251, 708/253, 714/728, 714/731, 714/739, 714/781, 377/26
• US Class Current: 375/130
• CPC Class Codes: H04B 1/707 using direct sequence modulation

Abstract

A method and apparatus for the creation and use of a recursive system that generates an output that depends upon a plurality of previous outputs by first processing previous outputs to obtain processed values, storing the processed values, determining new outputs depending on the processed values by providing a connection to stored processed values, the connection being operative to connect the stored processed values to a series of switches and adders that reverse process the processed values.

Claims

1. A recursive system, with an output that depends on a plurality of previous outputs:

first means for processing a series of previous outputs to obtain a set of processed values;

means for storing the set of processed values;

means for determining new outputs depending on the set of processed values having a connection to the means for storing, the connection further comprising an operative connection between the means for storing and at least one adder; and

means for reverse processing the set of processed values to obtain the series of previous outputs the means for reverse processing further comprising the output of the adder being supplied to at least one switch.

2. The system of claim 1, in which:

the system further comprises means to initialize the stored processed values at least at system start-up;

the system further comprises means for further processing the processed values to obtain a plurality of further processed values, the new outputs depending on both the processed values and the further processed values, the reverse processing including reverse processing both processed values and the further processed values to obtain the original value of respective outputs;

the first means for processing include a microcomputer having a processor, a memory and a clock interconnected by a bus and attached to a power supply, the memory containing a computer program;

the storing means are selected from registers, a D-flip-flop, a word memory;

the determining means includes the microcomputer of the first processing means for performing the determining or another microcomputer for performing the determining, and the microcomputer for performing the determining includes a computer program for determining the new outputs depending on the processed values;

the reverse processing means may also include the microcomputer of the first processing means or another microcomputer for processing in which the memory also includes a computer program for reverse processing the processed values to obtain the original outputs;

the reverse processing is performed immediately in a single operation; and

the system further comprises;

means for processing the original outputs to obtain a different output.

3. The recursive system, as defined by claim 1 wherein the means for determining further comprises the connection having at least one network connection wherein the network connection is supplied to the adder input as well as to an input of a different one of the at least one switches.

4. The recursive system, as defined by claim 3 wherein the means for reverse processing further comprises each of the at least one switches having an output into a different one of a plurality of adders.

5. The recursive system, as defined by claim 4 wherein the means for reverse processing further comprises a value input to select a value of each of the switches.

6. The method of operating a recursive system, as defined by claim 5 wherein the step for determining new outputs further comprises placing the connection having at least one network connection wherein the network connection is supplied to the adder input as well as to an input of a different one of the at least one switches.

7. The method of operating a recursive system, as defined by claim 6 wherein the step of reverse processing the processed values further comprises placing outputs from each of the at least one switches into an input for a subsequent one of a plurality of adders.

8. The method of operating a recursive system, as defined by claim 7 wherein the step of reverse processing the processed values further comprises placing outputs from each of the at least one switches into an input for a subsequent one of a plurality of adders.

9. The method of operating a recursive system, as defined by claim 8 wherein the step of reverse processing the processed values further comprises placing a value input to select a value of each of the switches.

10. A masked Galois linear feedback shift register, comprising:

a series of binary registers in a circuit loop with a value input of each subsequent register connected to an output of a previous register in the loop;

one or more modulo-2 adders inserted between pairs of adjacent registers in the connections between the outputs of previous registers and respective value inputs of subsequent registers of the register series, each adder having a first input connected to the previous respective register and an output connected to the subsequent respective register of the register pair, and each adder having a second input connected to the output of a last register and to the input of a first register of the register series to form the loop;

a clock signal line connected to a clock input of each register of the register series so that when a clock signal is transmitted through the clock signal line, each register begins to output a value being received at that time at the register'"'"'s value input and continues to output that value regardless of any subsequent change in the input value until the next clock signal;

means for initializing the value of each register to provide an initial value at least at the start-up of the Galois linear feedback shift register;

a series of modulo-2 adders with a first input of each subsequent adder in the adder series connected to an output of a previous adder in the adder series;

a multitude of mask switches including a first mask switch with an output connected to a first input of a first adder of the adder series and subsequent mask switches with outputs connected to respective second inputs of adders in the adder series;

an mask value input line for each mask switch to set the value of the mask switches depending on a selected mask value;

connection networks between the inputs or outputs of the registers and each respective mask switch, each network selected from;

a connection between the input or output of the register and the input of the respective mask switch; and

connections between the inputs or outputs of multiple registers and the inputs of a modulo-2 adder and a connection between the output of the adder and the respective mask switch; and

an output terminal connected to the output of a last modulo-2 adder in the adder series.

11. The masked Galois linear feedback shift register of claim 10, in which:

the initializing means is selected from;

selecting registers with predetermined initial values;

selectively connecting either set and reset lines to D-flip-flops;

providing data lines to each register for setting the initial value to any computed value;

the modulo-2 adders are XOR gates;

the registers are D-flip-flops;

the coefficients of a primitive polynomial determine;

which pairs of registers have modulo-2 adders between them, and the networks between the registers; and

the coefficients of the primitive matrix also determine the initial values of the registers.

12. A transmitter comprising:

an input for an information signal;

a power supply;

a microcontroller connected to the power supply;

a loop series of binary registers with a value input of each subsequent register connected to an output of a previous register;

one or more modulo-2 adders selectively connected between respective pairs of subsequent registers of the register series, each adder having a first input connected to a previous register and an output connected to a subsequent register of the register pair and having a second input connected between a last register and a first register of the register series;

a clock signal line connected to a clock input of each register of the register series so that when a clock signal is transmitted through the clock signal line each of the registers begins to output a value being received at that time at the register'"'"'s value input;

means for initializing the value of each register to provide an initial value at the start-up of a Galois linear feedback shift register;

a series of modulo-2 adders with a first input of each subsequent adder in the adder series connected to an output of a previous adder in the adder series;

a multitude of mask switches including a first mask switch with an output connected to a first input of a first adder of the adder series and subsequent mask switches with outputs connected to respective second inputs of adders in the adder series;

a respective mask value input line for each mask switch to set the value of the mask switches depending on mask value automatically selected by the microcontroller;

connection networks between the inputs or outputs of the registers and each respective mask switch, each network selected from;

a connection between the input or output of the register and the input of the respective mask switch; and

connections between the inputs or outputs of multiple registers and the inputs of a modulo-2 adder and a connection between the output of the adder and the respective mask switch;

a spreader to spread the information signal depending on the output of a last modulo-2 adder of the adder series; and

transmitter apparatus for transmitting the spread information signal into a medium.

13. The transmitter of claim 12, in which:

the medium is selected from;

computer media in a media drive of the transmitter, a broadband network connected to the transmitter, and an antenna together with an open space through which radio waves travel; and

the microcontroller includes a processor, a memory, and a clock interconnected by a bus.

14. A transmitter comprising:

receiver means for receiving a spread information signal from a medium;

a power supply;

a microcontroller connected to the power supply;

a loop series of binary registers with a value input of each subsequent register connected to an output of a previous register;

one or more modulo-2 adders selectively connected between respective pairs of subsequent registers of the register series, each adder having a first input connected to a previous register and an output connected to a subsequent register of the register pair and having a second input connected between a last register and a first register of the register series;

a clock signal line connected to a clock input of each register of the register series so that when a clock signal is transmitted through the clock signal line each of the registers begins to output a value being received at that time at the register'"'"'s value input;

means for initializing the value of each register to provide an initial value at the start-up of a Galois linear feedback shift register;

a series of modulo-2 adders with a first input of each subsequent adder in the adder series connected to an output of a previous adder in the adder series;

a multitude of mask switches including a first mask switch with an output connected to a first input of a first adder of the adder series and subsequent mask switches with outputs connected to respective second inputs of adders in the adder series;

an mask value input line for each mask switch to set the value of the mask switches depending on mask value automatically selected by the microcontroller;

connection networks between the inputs or outputs of the registers and each respective mask switch, each network selected from;

a connection between the input or output of the register and the input of the respective mask switch; and

connections between the inputs or outputs of multiple registers and the inputs of a modulo-2 adder and a connection between the output of the adder and the respective mask switch;

a de-spreader to de-spread the spread information signal depending on the output of a last modulo-2 adder of the adder series to produce a recovered information signal; and

an output for the recovered information signal.

15. A method of operating a recursive system, with an output depending on a plurality of previous outputs:

processing a plurality of previous outputs to obtain processed values;

storing the processed values;

determining new outputs depending on the processed values by placing a connection to processed values stored in the step of storing, the connection providing the processed values as an input to at least one adder; and

reverse processing the processed values to obtain the previous outputs, the step of reverse processing further comprising supplying an output from the adder to at least one switch.