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Method and apparatus for automated generation of test semiconductor wafers

  • US 6,647,309 B1
  • Filed: 05/22/2000
  • Issued: 11/11/2003
  • Est. Priority Date: 05/22/2000
  • Status: Expired due to Term
First Claim
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1. A method, comprising:

  • performing at least one process run of semiconductor devices;

    determining whether an excursion of said process exists;

    performing an automated test wafer generation process in response to said determination that an excursion of said process exists; and

    implementing a control parameter modification sequence for processing a subsequent run of semiconductor devices in response to an examination of said test wafers.

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