EPROM used as a voltage monitor for semiconductor burn-in
First Claim
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1. An EPROM configuration to monitor a semiconductor burn-in bias voltage, comprising:
- a) a source and substrate of an EPROM connected together and connected to circuit ground, b) a gate and a drain of said EPROM connected together and connected to a burn-in bias voltage, c) said burn-in bias voltage connected to semiconductor product in a burn-in test, d) said burn-in bias voltage induces electrons at a substrate surface of said EPROM that are accelerated and trapped in said gate, which increases a threshold voltage of said gate, e) voltage fluctuations that increases the burn-in bias voltage, induce more electrons into said substrate surface and subsequently further increases said threshold voltage of the gate.
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Abstract
An EPROM is configured in a special way to monitor in situ the applied voltage to semiconductor product in a burn-in test and capture the maximum value of the applied voltage during the test. This technique operates off the threshold shift mechanism in which gate bias induces electrons at the substrate surface which are accelerated by the drain and become trapped in the polysilicon gate. The measurement of the threshold voltage shift for a particular period of time will be proportional to the value of the applied voltage. The trapped electrons can be released back to the substrate by use of ultra violet light.
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4 Claims
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1. An EPROM configuration to monitor a semiconductor burn-in bias voltage, comprising:
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a) a source and substrate of an EPROM connected together and connected to circuit ground, b) a gate and a drain of said EPROM connected together and connected to a burn-in bias voltage, c) said burn-in bias voltage connected to semiconductor product in a burn-in test, d) said burn-in bias voltage induces electrons at a substrate surface of said EPROM that are accelerated and trapped in said gate, which increases a threshold voltage of said gate, e) voltage fluctuations that increases the burn-in bias voltage, induce more electrons into said substrate surface and subsequently further increases said threshold voltage of the gate. - View Dependent Claims (2, 3, 4)
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