Thyristor-based device over substrate surface
First Claim
1. A method for forming a thyristor-based device having a thyristor structure with two base portions and a junction therebetween, the method comprising:
- forming a semiconductor substrate having an upper surface;
forming a transistor having a gate over the upper surface and source/drain regions in the substrate below the upper surface;
forming a thyristor with one of the source/drain regions as another portion of the thyristor and with a control port capacitively-coupled to one of the base portions and aligned with the junction.
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Abstract
A semiconductor device having a thyristor is manufactured in a manner that reduces or eliminates manufacturing difficulties commonly experienced in the formation of such devices. According to an example embodiment of the present invention, a thyristor is formed having some or all of the body of the thyristor extending above a substrate surface of a semiconductor device. The semiconductor device includes at least one transistor having source/drain regions formed in the substrate prior to the formation of the thyristor. One or more layers of material are deposited on the substrate surface and used to form a portion of a body of the thyristor that includes anode and cathode end portions. Each end portion is formed having a base region and an emitter region, and at least one of the end portions includes a portion that is in the substrate and electrically coupled to the transistor. A control port is formed capacitively coupled to at least one of the base regions.
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Citations
36 Claims
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1. A method for forming a thyristor-based device having a thyristor structure with two base portions and a junction therebetween, the method comprising:
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forming a semiconductor substrate having an upper surface;
forming a transistor having a gate over the upper surface and source/drain regions in the substrate below the upper surface;
forming a thyristor with one of the source/drain regions as another portion of the thyristor and with a control port capacitively-coupled to one of the base portions and aligned with the junction. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
forming the control port over the substrate;
forming an oxide over the substrate, the transistor and the control port;
removing a portion of the oxide adjacent the thyristor control port and forming an opening having a sidewall;
etching a portion of the sidewall adjacent the control port and depositing gate oxide in the etched portion; and
forming at least one base section of the thyristor in the opening that is capacitively coupled to the control port via the oxide.
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33. The method of claim 1, further comprising frowning a plurality of the thyristor-based devices, the plurality of thyristor-based devices forming a memory device.
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34. The method of claim 1, wherein forming the thyristor includes forming a thyristor having a gate that is adapted to capacitively couple a signal to the thyristor to control current passing through the thyristor independently from any MOS inversion channel formation against a portion of the thyristor to which the gate is capacitively coupled.
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17. A method for forming a thyristor-based device having a thyristor structure, the method comprising:
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forming a semiconductor substrate having an upper surface;
forming a transistor having a gate over the upper surface and source/drain regions in the substrate below the upper surface; and
forming a thyristor by depositing a dielectric over the formed transistor, creating an opening in the dielectric, and forming the thyristor-based device in the etched opening with one of the source/drain regions as a portion of the thyristor and extending over the upper surface. - View Dependent Claims (18, 19)
forming a gate dielectric on the thyristor; and
forming a control port on the gate dielectric.
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35. A method for forming a thin-capacitively-coupled thyristor-based memory device having a thyristor structure, the method comprising:
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forming a semiconductor substrate having an upper surface;
forming a transistor having a gate over the upper surface and source/drain regions in the substrate below the upper surface;
after forming the transistor, depositing an oxide layer over the substrate and the transistor;
removing a portion of the oxide over a first one of the source/drain regions and forming an opening, the source/drain region being used as one of the regions of the thyristor;
forming amorphous polysilicon in the opening;
recrystallizing the amorphous polysilicon;
implanting the recrystallized polysilicon and forming a thyristor P base, N base and emitter region in the opening;
exposing a sidewall of the polysilicon;
forming a gate dielectric on the sidewall and adjacent one of the thyristor base portions;
depositing polysilicon on the gate dielectric and forming a thin capacitivcly coupled gate that is capacitively coupled to one of the thyristor base portions;
depositing an oxide material over the substrate, the transistor, the thin capacitively coupled gate and the thyristor portions;
etching a contact opening through the oxide material and to the emitter region formed in the opening;
forming a local interconnect electrically coupled to the exposed emitter region; and
forming an electrical contact to a second one of the source/drain regions.
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36. A method for forming a thyristor-based device having a thyristor structure with two base portions and a junction therebetween, the method comprising:
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forming a semiconductor substrate having an upper surface;
forming a transistor having a gate over the upper surface and source/drain regions in the substrate below the upper surface; and
forming a thyristor with a control port capacitively-coupled to one of the base portions and aligned with the junction.
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Specification