Method and apparatus for linear characterization of multi-terminal single-ended or balanced devices
First Claim
1. A method of characterizing a DUT, comprising the steps of:
- calibrating a multiport test set;
coupling each terminal of the DUT to a respective port of the multiport test set;
measuring S-parameters [S] of the DUT with the multiport test set;
determining elements of a scalar orthogonal matrix [M] corresponding to terminals of the DUT and DUT modes of operation wherein said scalar orthogonal matrix [M] comprises matrix elements representing at least one single-ended terminal of the DUT and matrix elements representing at least one balanced terminal of the DUT; and
transforming the S-parameters of the DUT into mixed-mode S-parameters [Smm] according to a transformation Smm=MSM−
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Abstract
A method and apparatus for characterizing a device under test (“DUT”) calibrates a multiport test set and measures S-parameters [S] of the DUT. The method and apparatus further involves determining elements of a scalar orthogonal matrix [M] corresponding to terminals of the DUT and DUT modes of operation. The scalar orthogonal matrix [M] comprises a row of elements representing a single-ended terminal of the DUT, and four rows of elements representing a balanced terminal of the DUT. The S-parameters of the DUT are then transformed into mixed-mode S-parameters [Smm] according to Smm=MSM−1. A method of and apparatus for characterizing a DUT involves calibrating a multiport test set, coupling the DUT to the multiport test set, and measuring S-parameters of the DUT. The S-parameters are converted to a time domain representation and at least one of the S-parameters is convolved with a simulated input signal to generate an output response. The output response is then displayed.
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Citations
77 Claims
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1. A method of characterizing a DUT, comprising the steps of:
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calibrating a multiport test set;
coupling each terminal of the DUT to a respective port of the multiport test set;
measuring S-parameters [S] of the DUT with the multiport test set;
determining elements of a scalar orthogonal matrix [M] corresponding to terminals of the DUT and DUT modes of operation wherein said scalar orthogonal matrix [M] comprises matrix elements representing at least one single-ended terminal of the DUT and matrix elements representing at least one balanced terminal of the DUT; and
transforming the S-parameters of the DUT into mixed-mode S-parameters [Smm] according to a transformation Smm=MSM−
1.- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
assigning a value of 1 to a corresponding column in a respective row of the scalar orthogonal matrix for each single-ended terminal;
assigning a value of to a corresponding column in a first row of said two rows of the scalar orthogonal matrix representing said differential mode of operation, assigning a value of to a corresponding column in a second row of said two rows of the scalar orthogonal matrix representing said differential mode of operation; assigning a value of to a corresponding column in a first row of said two rows of the scalar orthogonal matrix representing said common mode of operation; assigning a value of to a corresponding column in a second row of said two rows of the scalar orthogonal matrix representing said common mode of operation; and assigning a value of zero to a remainder of elements of the scalar orthogonal matrix.
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16. A method of characterizing a DUT as recited in claim 1 wherein the DUT comprises a plurality of single-ended terminals and at least one balanced terminal.
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17. A method of characterizing a DUT as recited in claim 1 wherein the DUT comprises a plurality of balanced terminals.
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18. A method of characterizing a DUT as recited in claim 1 wherein the DUT comprises a plurality of balanced terminals and no single-ended terminals.
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19. A multiport test set that characterizes a multiterminal DUT, comprising:
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a plurality of ports;
a signal generator that provides a test signal over a frequency range;
a switching device, coupled between the signal generator, the plurality of ports of the multiport test set and at least on test channel receiver, that couples the test signal to any port of the multiport test set and to the at least one test channel receiver;
a reference receiver, coupled to the signal generator, that measures the test signal to determine a reference value;
the at least one test channel receiver that can measure the test signal at each port of the multiport test set;
means for determining S-parameters [S] of the DUT from the test signal measurements at each port of the multiport test set with the at least one test channel receiver, and from the reference value;
means for determining elements of a scalar orthogonal matrix [M] corresponding to a number of terminals of the DUT and modes of operation of the DUT wherein matrix elements in said scalar orthogonal matrix represent at least one single-ended terminal of said DUT and matrix elements of said scalar orthogonal matrix represent at least one balanced terminal pair of said DUT; and
means for transforming the S-parameters [S] of the DUT into mixed-mode S-parameters [Smm] according to a transformation [Smm]=MSM−
1.- View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36)
means for normalizing the S-parameters of the DUT with known reflection coefficients of each port of the multiport test set.
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21. A multiport test set as recited in claim 19 wherein a first two of said four rows in said scalar orthogonal matrix representing respective balanced terminal pair of said DUT represent a differential mode of operation and a second two of said four rows in said scalar orthogonal matrix representing a common mode of operation.
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22. The multiport test set as claimed in claim 21, wherein the means for determining elements of the scalar orthogonal matrix [M] comprises:
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means for assigning a value of 1 to a corresponding column in a respective row of the scalar orthogonal matrix for each a single-ended terminal;
means for assigning a value of to a corresponding column in a first row of said two rows of the scalar orthogonal matrix representing said differential mode of operation, means for assigning a value of to a corresponding column in a second row of said two rows of the scalar orthogonal matrix representing said differential mode of operation; means for assigning a value of to a corresponding column in a first row of said two rows of the scalar orthogonal matrix representing said common mode of operation; means for assigning a value of to a corresponding column in a second row of said two rows of the scalar orthogonal matrix representing said common mode of operation; and means for assigning a value of zero to a remainder of elements of the scalar orthogonal matrix.
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23. The multiport test set as claimed in claim 19, further comprising means for converting the mixed-mode S-parameters [Smm] to a time-domain representation.
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24. The multiport test set as claimed in claim 23, further comprising means for determining an impulse response of the DUT from the time-domain representation of the mixed-mode S-parameters.
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25. The multiport test set as claimed in claim 23, further comprising:
means for determining a step response of the DUT from the time-domain representation of the mixed-mode S-parameters.
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26. The multiport test set as claimed in claim 23, further comprising:
means for determining an impedance profile of the DUT from the time-domain representation of the mixed-mode S-parameters.
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27. The multiport test set as claimed in claim 23, further comprising:
means for providing a mathematical representation of an input signal to the DUT.
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28. The multiport test set as claimed in claim 27, further comprising:
means for convolving the mathematical representation of the input signal with any element of the time-domain representation of the mixed-mode S-parameters of the DUT, to determine an output response of the DUT to the input signal.
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29. The multiport test set as claimed in claim 28, further comprising:
means for providing the output response of the DUT to the input signal as an eye pattern.
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30. The multiport test set as claimed in claim 28, further comprising:
means for de-embedding a portion of the DUT from the time-domain representation of the output response of the DUT.
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31. The multiport test set as claimed in claim 19, further comprising:
means for cascading the S-parameters of the DUT with S-parameters of a device to be embedded with the DUT, to provide cascaded S-parameters.
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32. The multiport test set as claimed in claim 31, further comprising:
means for converting the cascaded S-parameters to a time-domain representation.
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33. The multiport test set as claimed in claim 19, wherein the multiport test set comprises N ports of the multiterminal DUT comprises N terminals, and wherein the at least one test channel receiver comprises N test channel receivers.
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34. The multiport test set as claimed in claim 19, wherein the multiport test set comprises N ports and the multiterminal DUT comprises N terminals, and wherein a number of channel receivers is provided to minimize a number of sweeps of the test signal generator and, for each sweep of the signal generator, to capture a test channel to reference channel measurement without any redundancy and without unused test channel receiver measurements.
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35. The multiport test set as claimed in claim 19, wherein the multiport test set comprises N ports and the multiterminal DUT comprises N terminals, and wherein the at least one test channel receiver comprises two test channel receivers.
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36. The multiport test set as claimed in claim 19, wherein the multiport test set comprises N ports and the multiterminal DUT comprises N terminals, and wherein the at least one test channel receiver comprises three test channel receivers.
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37. A method of characterizing a DUT, comprising the steps of:
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calibrating a multiport test set;
coupling each terminal of the DUT to a port of the multiport test set;
measuring S-parameters of the DUT with the multiport test set;
converting the S-parameters to a time domain representation;
convolving at least one of said converted S-parameters with a simulated input signal to generate an output response; and
presenting said output response. - View Dependent Claims (38, 39, 40, 41, 42, 43, 44, 45, 46, 47)
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48. A multiport test set that characterizes a multiterminal DUT, comprising:
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a plurality of ports;
a signal generator that provides a test signal over a frequency range;
a switching device, coupled between the signal generator, the plurality of ports of the mutliport test set and at least one test channel receiver, that couples the test signal to any port of the multiport test set and to the at least one test channel receiver;
a reference receiver, coupled to the signal generator, that measures the test signal to determine a reference value;
the at least one test channel receiver, that measures the test signal at each port of the multiport test set;
means for determining S-parameters [S] of the DUT from the test signal measurements at each port of the multiport test set and the reference value;
a conversion element for converting the S-parameters to a time-domain representation;
a computational element for convolving at least one of said converted S-parameters with a simulated input signal to generate an output response; and
a display for presenting said output response. - View Dependent Claims (49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62)
means for normalizing the S-parameters of the DUT with known reflection coefficients at each port of the multiport test set.
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50. The multiport test set as claimed in claim 48, further comprising:
means for determining an impulse response of the DUT from the time-domain representation of the S-parameters.
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51. The multiport test set as claimed in claim 48, further comprising:
means for determining a step response of the DUT from the time-domain representation of the S-parameters.
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52. The multiport test set as claimed in claim 48, further comprising:
means for determining an impedance profile of the DUT from the time-domain representation of the S-parameters.
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53. The multiport test set as claimed in claim 48, wherein said computational element for convolving further comprises:
means for providing a mathematical representation of an input signal to the DUT.
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54. The multiport test set as claimed in claim 53, wherein said computational element for convolving further comprises:
means for convolving the mathematical representation of the input signal with any element of the time-domain representation of the S-parameters of the DUT, and for determining an output response.
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55. The multipart test set as claimed in claim 54, further comprising:
means for de-embedding a portion of the DUT from the time-domain representation of the output response of the DUT.
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56. The multiport test set as claimed in claim 54, further comprising:
means for providing the output response of the DUT as an eye pattern.
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57. The multiport test set as claimed in claim 48, further comprising:
means for cascading the S-parameters of the DUT with S-parameters of a device to be embedded with the DUT, to provide cascaded S-parameters.
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58. The multiport test set as claimed in claim 57, further comprising:
means for converting the cascaded S-parameters to a time-domain representation.
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59. The multiport test set as claimed in claim 48, wherein the multiport test set comprises N-ports and the DUT comprises N terminals, and wherein the at least one test channel receiver comprises N test channel receivers.
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60. The multiport test set as claimed in claim 48, wherein the multiport test set comprises N ports and the DUT comprises N terminals, and wherein the at least one test channel receivers comprises a number of test channel receivers that minimizes a number of sweeps of the test signal generator and that allows, for each sweep of the signal generator, to capture a measurement without any redundancy and without any unused test channel receivers.
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61. The multiport test set as claimed in claim 48, wherein the multiport test set comprises N-ports and the DUT comprises N terminals, and wherein the at least one test channel receiver comprises two test channel receivers.
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62. The multiport test set as claimed in claim 48, wherein the multiport test set comprises N-ports and the DUT comprises N terminals, and wherein the at least one test channel receiver comprises three test channel receivers.
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63. A method of characterizing a DUT, comprising the steps of:
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calibrating a multiport test set;
coupling each terminal of the DUT to a respective port of the multiport test set;
measuring S-parameters [S] of the DUT with the multiport test set, said DUT having at least three balanced terminals;
determining elements of a scalar orthogonal matrix [M] corresponding to terminals of the DUT and DUT modes of operation wherein said scalar orthogonal matrix [M] comprises matrix elements representing a respective one of said balanced terminals; and
transforming the S-parameters of the DUT into mixed-mode S-parameters [Smm] according to a transformation Smm=MSM−
1.- View Dependent Claims (64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77)
assigning a value of to a corresponding column in a first row of said two rows of the scalar orthogonal matrix representing said differential mode of operation, assigning a value of to a corresponding column in a second row of said two rows of the scalar orthogonal matrix representing said differential mode of operation; assigning a value of to a corresponding column in a first row of said two rows of the scalar orthogonal matrix representing said common mode of; assigning a value of to a corresponding column in a second row of said two rows of the scalar orthogonal matrix representing said common mode of operation; and assigning a value of zero to a remainder of elements of the scalar orthogonal matrix.
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68. The method of characterizing the DUT as claimed in claim 63, further comprising the step of converting the mixed-mode S-parameters [Smm] to a time-domain representation.
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69. The method of characterizing the DUT as claimed in claim 68, further comprising the step of determining an impulse response of the DUT from the time-domain representation of the mixed-mode S-parameters.
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70. The method of characterizing the DUT as claimed in claim 68, further comprising the step of determining a step response of the DUT from the time-domain representation of the mixed-mode S-parameters.
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71. The method of characterizing the DUT as claimed in claim 68, further comprising the step of determining an impedance profile of the DUT from the time-domain representation of the mixed-mode S-parameters.
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72. The method of characterizing the DUT as claimed in claim 68, further comprising the step of providing a mathematical representation of a simulated input signal to the DUT.
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73. The method of characterizing the DUT as claimed in claim 72, further comprising the step of convolving the mathematical representation of the input signal with any element of the time-domain representation of the mixed-mode S-parameters of the DUT, to determine an output response of the DUT to the input signal.
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74. The method of characterizing the DUT as claimed in claim 73, further comprising the step of providing a display of the output response of the DUT relative to the simulated input signal as an eye pattern.
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75. The method of characterizing the DUT as claimed in claim 73, further comprising the step of de-embedding a portion of the DUT from the output response of the DUT.
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76. The method of characterizing the DUT as claimed in claim 63, further comprising the step of cascading the S-parameters of the DUT with S-parameters of a device to be embedded with the DUT, to provide cascaded S-parameters.
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77. The method of characterizing the DUT as claimed in claim 76, further comprising the step of converting the cascaded S-parameters to a time-domain representation.
Specification