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Heterogeneous integrated circuit with reconfigurable logic cores

  • US 6,653,859 B2
  • Filed: 01/16/2002
  • Issued: 11/25/2003
  • Est. Priority Date: 06/11/2001
  • Status: Expired due to Term
First Claim
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1. An integrated circuit comprising:

  • a common interface bus system, a digital signal processor coupled to said common interface bus system, a first programmable logic core having a configuration interface coupled to said common interface bus system and having a control interface coupled to said common interface bus system, and a second programmable logic core having a configuration interface coupled to said common interface bus system and having a control interface coupled to said common interface bus system, whereby said digital signal processor may control operation of one of said first and second programmable logic cores while the other of said first and second programmable logic cores is being reconfigured.

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