Multiplying digital-to-analog converter structures that reduce signal distortion

• US 6,653,961 B1
• Filed: 10/16/2002
• Issued: 11/25/2003
• Est. Priority Date: 05/08/2002
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Jordan, Edward Perry, Gosser, Royal A.
• Primary Examiner(s): Tokar, Michael
• Assistant Examiner(s): NGUYEN, KHAI M
• Application Number:
  US10/272,758
• Time in Patent Office: 405 Days
• Field of Search: 341/135, 341/136, 341/144, 341/139
• US Class Current: 341/144
• CPC Class Codes: H03M 1/0614 of harmonic distortion H03M1/0617 takes precedence
• CPC Class Codes: H03M 1/66 Digital/analogue converters H03M1/001 – H03M1/10 take precedence

Abstract

Mulitplying digital-to-analog converters (MDACs) are provided that reduce signal distortion without significantly raising current demand. These goals are achieved with input structures that lower input impedances and enhance the driving of nonlinear capacitances that are generally presented by the DAC portion of these devices.

Claims

1. A multiplying digital-to-analog converter (MDAC) that converts an input signal to an analog output signal with a conversion gain that corresponds to a digital command signal, comprising:

a digital-to-analog converter that includes a reference transistor and associated current mirrors whose currents are passed in response to said digital command signal to form said analog output signal wherein said reference transistor has a reference control terminal and a reference current terminal that receives said input signal;

a main current source;

a drive transistor that has a drive control terminal and a drive current terminal wherein said drive control terminal is coupled to said main current source and said drive current terminal is coupled to said reference control terminal;

a pass transistor coupled between said main current source and said reference current terminal;

a diode-coupled transistor; and

a differential amplifier that has a first input terminal coupled to said diode-coupled transistor and a second input terminal coupled to said reference current terminal and also has an output terminal coupled to drive said pass transistor.

2. The MDAC of claim 1, further including a second current source coupled to said reference control terminal to provide current that complements current from said drive transistor.

3. The MDAC of claim 1, further including a third current source coupled to bias said diode-coupled transistor.

4. The MDAC of claim 1, further including a resistor inserted between said drive current terminal and said current mirrors to enhance stability.

5. The MDAC of claim 1, wherein said reference transistor, said current mirrors, said drive transistor, said pass transistor and said diode-coupled transistor are metal-oxide-semiconductor (MOS) transistors.

6. A multiplying, digital-to-analog converter (MDAC) that converts an input signal to an analog output signal with a conversion gain that corresponds to a digital command signal, comprising:

a digital-to-analog converter that includes a reference transistor and associated current mirrors whose currents are passed in response to said digital command signal to form said analog output signal wherein said reference transistor has a reference control terminal and also has a reference current terminal that receives said input signal;

a main current source;

a drive transistor that has a drive control terminal and a drive current terminal wherein said drive control terminal is coupled to said main current source and said drive current terminal is coupled to said reference control terminal;

a pass transistor that has a pass control terminal and first and second pass current terminals with said first pass current terminal coupled to said main current source and said second pass current terminal coupled to said reference current terminal; and

serially-connected first and second diode-coupled transistors coupled to bias said pass control terminal.

7. The MDAC of claim 6, further including a second current source coupled to said reference control terminal to provide current that complements current from said drive transistor.

8. The MDAC of claim 6, further including a third current source coupled to bias said first and second diode-coupled transistors.

9. The MDAC of claim 6, further including a resistor inserted between said drive current terminal and said current mirrors to enhance stability.

10. The MDAC of claim 6, wherein said reference transistor, said current mirrors, said drive transistor, said pass transistor and said first and second diode-coupled transistors are metal-oxide-semiconductor (MOS) transistors.

11. A multiplying digital-to-analog converter (MDAC) that converts an input signal to an analog output signal with a conversion gain that corresponds to a digital command signal, comprising:

a reference transistor that has a reference control terminal and also has a reference current terminal that receives said input signal;

a plurality of current mirrors coupled to said reference control terminal;

a plurality of transistor switches that respond to said digital command signal and are each coupled in series with a corresponding one of said current mirrors;

a main current source;

a drive transistor that has a drive control terminal and a drive current terminal wherein said drive control terminal is coupled to said main current source and said drive current terminal is coupled to said reference control terminal;

a pass transistor coupled between said main current source and said reference current terminal;

a diode-coupled transistor; and

a differential amplifier that has a first input terminal coupled to said diode-coupled transistor and a second input terminal coupled to said reference current terminal and also has an output terminal coupled to drive said pass transistor.

12. The MDAC of claim 11, further including:

a second current source coupled to said reference control terminal to provide current that complements current from said drive transistor; and

a third current source coupled to bias said diode-coupled transistor.

13. The MDAC of claim 11, further including a resistor inserted between said drive current terminal and said current mirrors to enhance stability.

14. The MDAC of claim 11, wherein said reference transistor, said current mirrors, said transistor switches, said drive transistor, said pass transistor and said diode-coupled transistor are metal-oxide-semiconductor (MOS) transistors.

15. The MDAC of claim 11, wherein said reference control terminal and said drive control terminal are gates, said reference current terminal is a drain and said drive current terminal is a source.

16. The MDAC of claim 11, wherein said current mirrors are sized to provide binarily-weighted currents.

17. A multiplying digital-to-analog converter (MDAC) that converts an input signal to an analog output signal with a conversion gain that corresponds to a digital command signal, comprising:

a reference transistor that has a reference control terminal and also has a reference current terminal that receives said input signal;

a plurality of current mirrors coupled to said reference control terminal;

a plurality of transistor switches that respond to said digital command signal and are each coupled in series with a corresponding one of said current mirrors;

a main current source;

a drive transistor that has a drive control terminal and a drive current terminal wherein said drive control terminal is coupled to said main current source and said drive current terminal is coupled to said reference control terminal;

a pass transistor that has a pass control terminal and first and second pass current terminals with said first pass current terminal coupled to said main current source and said second pass current terminal

coupled to said reference current terminal; and

serially-connected first and second diode-coupled transistors coupled to

bias said pass control terminal.

18. The MDAC of claim 17, further including:

a second current source coupled to said reference control terminal to provide current that complements current from said drive transistor; and

a third current source coupled to bias said first and second diode-coupled transistors.

19. The MDAC of claim 17, further including a resistor inserted between said drive current terminal and said current mirrors to enhance stability.

20. The MDAC of claim 17, wherein said reference transistor, said current mirrors, said transistor switches, said drive transistor, said pass transistor and said diode-coupled transistors are metal-oxide-semiconductor (MOS) transistors.

21. The MDAC of claim 17, wherein said reference control terminal, said drive control terminal and said pass control terminal are gates, said reference current terminal and said first pass current terminal are drains and said drive current terminal and said second pass current terminal are sources.

22. The MDAC of claim 17, wherein said current mirrors are sized to provide binarily-weighted currents.

23. A line driver that responds to a driver input signal and drives a load impedance with a gain that corresponds to a digital command signal, comprising:

a buffer amplifier that generates a differential buffer signal in response to said driver input signal;

a transformer that has an input winding and also has an output winding for coupling across said load impedance; and

first and second multiplying digital-to-analog converters (MDACs) that are each coupled to receive a respective side of said differential buffer signal and drive a respective side of said input winding;

wherein each of said MDACs includes;

a) a digital-to-analog converter that includes a reference transistor and associated current mirrors whose currents are passed to said respective side of said input winding in response to said digital command signal wherein said reference transistor has a reference control terminal and also has a reference current terminal that receives said respective side of said differential buffer signal;

b) a main current source;

c) a drive transistor that has a drive control terminal and a drive current terminal wherein said drive control terminal is coupled to said main current source and said drive current terminal is coupled to said reference control terminal;

d) a pass transistor coupled between said main current source and said reference current terminal;

e) a diode-coupled transistor; and

f) a differential amplifier that has a first input terminal coupled to said diode-coupled transistor and a second input terminal coupled to said reference current terminal and also has an output terminal coupled to drive said pass transistor.

24. The line driver of claim 23, wherein said buffer amplifier includes:

a preamplifier that receives said driver input signal; and

a vernier that responds to said preamplifier and generates said differential buffer signal with a gain that corresponds to said digital command signal.

25. The line driver of claim 23, further including a third current source coupled to bias said diode-coupled transistor.

26. The line driver of claim 23, further including a resistor inserted between said drive current terminal and said current mirrors to enhance stability.

27. A line driver that responds to a driver input signal and drives a load impedance with a gain that corresponds to a digital command signal, comprising:

a buffer amplifier that generates a differential buffer signal in response to said driver input signal;

a transformer that has an input winding and also has an output winding for coupling across said load impedance; and

first and second multiplying digital-to-analog converters (MDACs) that are each coupled to receive a respective side of said differential buffer signal and drive a respective side of said input winding;

wherein each of said MDACs includes;

a) a digital-to-analog converter that includes a reference transistor and associated current mirrors whose currents are passed to said respective side of said input winding in response to said digital command signal wherein said reference transistor has a reference control terminal and also has a reference current terminal that receives said respective side of said differential buffer signal;

b) a main current source;

c) a drive transistor that has a drive control terminal and a drive current terminal wherein said drive control terminal is coupled to said main current source and said drive current terminal is coupled to said reference control terminal;

d) a pass transistor that has a pass control terminal and first and second pass current terminals with said first pass current terminal coupled to said main current source and said second pass current terminal coupled to said reference current terminal; and

e) serially-connected first and second diode-coupled transistors coupled to bias said pass control terminal.

28. The line driver of claim 27, wherein said buffer amplifier includes:

a preamplifier that receives said driver input signal; and

a vernier that responds to said preamplifier and generates said differential buffer signal with a gain that corresponds to said digital command signal.

29. The line driver of claim 27, further including a third current source coupled to bias said diode-coupled transistor.

30. The line driver of claim 27, further including a resistor inserted between said drive current terminal and said current mirrors to enhance stability.

31. A multiplying digital-to-analog converter (MDAC) that converts an input signal to an analog output signal with a conversion gain that corresponds to a digital command signal, comprising:

a digital-to-analog converter that includes a reference transistor and associated current mirrors whose currents are passed in response to said digital command signal to form said analog output signal wherein said reference transistor has a reference control, terminal and has a reference current terminal that receives said input signal;

a drive transistor coupled to provide current to said reference control terminal;

a pass transistor that has a pass control terminal and also has a pass current terminal coupled to said reference current terminal; and

a differential amplifier that has a first input terminal which receives a bias signal, has a second input terminal coupled to said reference current terminal and has an output terminal coupled to said pass control terminal.

32. The converter of claim 31, further including a diode-coupled transistor coupled to provide said bias signal.

33. The converter of claim 31, wherein said drive transistor is a mietal-oxide-semiconductor (MOS) transistor and is coupled as a source follower.

34. A multiplying digital-to-analog converter (MDAC) that converts an input signal to an analog output signal with a conversion gain that corresponds to a digital command signal, comprising:

a digital-to-analog converter that includes a reference transistor and associated current mirrors whose currents are passed in response to said digital command signal to form said analog output signal wherein said reference transistor has a reference control terminal and also has a reference current terminal that receives said input signal;

a drive transistor coupled to provide current to said reference control terminal; and

a pass transistor coupled to provide current to said reference current terminal.

35. The converter of claim 34, further including first and second diode-coupled transistors that are serially coupled to form a bias junction between them and wherein said pass transistor has a pass control terminal coupled to said bias junction and has a pass current terminal coupled to said reference current terminal.

36. The converter of claim 34, wherein said drive transistor is a metal-oxide-semiconductor (MOS) transistor and is coupled as a source follower.