Trench DMOS device with improved drain contact
First Claim
1. A trench DMOS transistor device comprising:
- a substrate of a first conductivity type, said substrate acting as a common drain region for said device;
an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower majority carrier concentration than said substrate;
a trench extending into said epitaxial layer from an upper surface of said epitaxial layer;
an insulating layer lining at least a portion of said trench;
a conductive region within said trench adjacent said insulating layer;
a body region of a second conductivity type provided within an upper portion of said epiraxial layer and adjacent said trench;
a source region of said first conductivity type within an upper portion of said body region and adjacent said trench;
a low resistivity deep region extending into said device from an upper surface of said epitaxial layer, said low resistivity deep region acting to provide electrical contact with said substrate; and
a metallic drain contact adjacent an upper surface of said deep region, a metallic source contact adjacent an upper surface of said source region, and a metallic gate contact adjacent an upper surface of said conductive region in a termination region remote from said source region.
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Accused Products
Abstract
A trench DMOS transistor device that comprises: (a) a substrate of a first conductivity type; (b) an epitaxial layer of first conductivity type over the substrate, wherein the epitaxial layer has a lower majority carrier concentration than the substrate; (c) a trench extending into the epitaxial layer from an upper surface of the epitaxial layer; (d) an insulating layer lining at least a portion of the trench; (e) a conductive region within the trench adjacent the insulating layer; (f) a body region of a second conductivity type provided within an upper portion of the epitaxial layer and adjacent the trench; (g) a source region of first conductivity type within an upper portion of the body region and adjacent the trench; and (h) one or more low resistivity deep regions extending into the device from an upper surface of the epitaxial layer. The low resistivity deep region acts to provide electrical contact with the substrate, which is a common drain region for the device. By constructing a trench DMOS transistor device in this fashion, source, drain and gate contacts can all be provided on a single surface of the device.
25 Citations
16 Claims
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1. A trench DMOS transistor device comprising:
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a substrate of a first conductivity type, said substrate acting as a common drain region for said device;
an epitaxial layer of said first conductivity type over said substrate, said epitaxial layer having a lower majority carrier concentration than said substrate;
a trench extending into said epitaxial layer from an upper surface of said epitaxial layer;
an insulating layer lining at least a portion of said trench;
a conductive region within said trench adjacent said insulating layer;
a body region of a second conductivity type provided within an upper portion of said epiraxial layer and adjacent said trench;
a source region of said first conductivity type within an upper portion of said body region and adjacent said trench;
a low resistivity deep region extending into said device from an upper surface of said epitaxial layer, said low resistivity deep region acting to provide electrical contact with said substrate; and
a metallic drain contact adjacent an upper surface of said deep region, a metallic source contact adjacent an upper surface of said source region, and a metallic gate contact adjacent an upper surface of said conductive region in a termination region remote from said source region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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Specification