MOS differential amplifier circuit having a wide linear input voltage range

• US 6,657,486 B2
• Filed: 09/05/2002
• Issued: 12/02/2003
• Est. Priority Date: 08/30/2000
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Inventors: Kimura, Katsuji
• Primary Examiner(s): NGUYEN, MINH T
• Application Number:
  US10/234,129
• Publication Number:
  US 20030052731A1
• Time in Patent Office: 453 Days
• Field of Search: 327/560, 327/561, 327/562, 327/563, 327/335, 327/339, 327/345, 327/361, 327/363, 327/252-254, 327/258-261, 327/277, 327/278, 327/291, 327/85
• US Class Current: 327/563
• CPC Class Codes: G06G 7/14 for addition or subtraction of vector quantities G06G7/22 ; computing the average by addition; differential amplifiers H03F3/45
• CPC Class Codes: H03F 2203/45456 the CSC comprising bias stabilisation means, e.g. DC-level stability, positive or negative temperature coefficient dependent control
• CPC Class Codes: H03F 2203/45484 the CSC comprising one or more op-amps
• CPC Class Codes: H03F 2203/45566 the IC comprising one or more dif stages in cascade with the dif amp
• CPC Class Codes: H03F 2203/45612 the IC comprising one or more input source followers as input stages in the IC
• CPC Class Codes: H03F 2203/45702 the LC comprising two resistors
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/4565 Controlling the common source circuit of the differential amplifier
• CPC Class Codes: H03F 3/4569 Controlling the common source circuit of the differential amplifier
• CPC Class Codes: H03F 3/45708 Controlling the common source circuit of the differential amplifier
• CPC Class Codes: H03F 3/45717 Controlling the loading circuit of the differential amplifier
• CPC Class Codes: H03F 3/45739 Controlling the loading circuit of the differential amplifier

Abstract

A MOS differential amplifier circuit has a differential pair having first and second MOS transistors. The source electrodes of the first and second MOS transistors are commonly coupled and driven by a current source, which can be adjusted to change the transconductance of the amplifier. The circuit can be provided with a quadri-tall cell or level shifter in order to provide this operation. With these operational characteristics, the MOS differential pair of this type can be used in a voltage adder/subtractor circuit.

Claims

1. A MOS differential amplifier circuit comprising:

a MOS differential pair having first and second MOS transistors and receiving an input differential voltage, source electrodes of said first and second MOS transistors being commonly coupled and being driven by a constant current source; and

third and fourth MOS transistors which are load transistors of said first and second MOS transistors, respectively, and the gates of said third and fourth MOS transistors receive the sum of a predetermined constant voltage and a voltage obtained by subtracting a common source voltage of said first and second MOS transistors from a common mode voltage,

wherein the source electrodes of said third and fourth MOS transistors are coupled to the drain electrodes of the first and second MOS transistors, respectively, and

wherein the drain electrodes of said third and fourth MOS transistors are commonly coupled.

2. A complementary MOS differential amplifier circuit comprising:

a MOS differential pair having first and second MOS transistors and receiving input voltages, source electrodes of said first and second MOS transistors being commonly coupled and being driven by a first constant current source;

a MOS quadri-tail cell having third, fourth, fifth and sixth MOS transistors which have different conductivity type from that of said first and second MOS transistors, source electrodes of said third, fourth, fifth and sixth MOS transistors being commonly coupled and being driven by a second constant current source wherein gate electrodes of said fifth and sixth MOS transistors being coupled to a common source electrode of said first and second MOS transistors, drain electrodes of said fifth and third MOS transistors being commonly coupled and forming one output terminal, drain electrodes of said sixth and fourth MOS transistors being commonly coupled and forming the other output terminal, and gate electrodes of said first and second MOS transistors and gate electrodes of said third and fourth MOS transistors receiving said input voltages.

3. A complementary MOS differential amplifier circuit as set forth in claim 2, further comprising level shifters for level-shifting said input voltages before being applied to said gate electrodes of said first and second MOS transistors and said gate electrodes of said third and fourth MOS transistors.

4. A complementary MOS differential amplifier circuit as set forth in claim 2, wherein the ratio of the current value of said first constant current source and transconductance parameter of said first and second MOS transistors is approximately half of the ratio of the current value of said second constant current source and transconductance parameter of said third, fourth, fifth and sixth MOS transistors.

5. A complementary MOS differential pair as set forth in claim 2, wherein transconductance of said MOS differential amplifier circuit is adjustable by controlling current values of said first and second constant current sources.