Method to reduce overhead associated with system I/O in a multiprocessor computer system

• US 6,658,522 B1
• Filed: 06/16/2000
• Issued: 12/02/2003
• Est. Priority Date: 06/16/2000
• Status: Expired due to Term

• Current Assignee: Emc IP Holding Company LLC (Dell Technologies Inc.)
• Original Assignee: EMC Corporation (Dell Technologies Inc.)
• Inventors: Martin, Brian James, McCann, Peter John
• Primary Examiner(s): Sparks, Donald
• Assistant Examiner(s): DINH, NGOC V
• Application Number:
  US09/596,295
• Time in Patent Office: 1,264 Days
• Field of Search: 711/1, 711/163, 711/6, 711/203, 711/206, 711/209, 709/1, 709/103, 710/2, 710/3, 710/6
• US Class Current: 711/1
• CPC Class Codes: G06F 12/126 with special data handling, e.g. priority of data or instructions, handling errors or pinning

Abstract

Featured is a method for reducing overhead associated with system input output (I/O) operations in a computer system having a plurality of processors and a physical memory accessed and used by the plurality of processors. The physical memory being accessed can be a global physical memory such as that used with SMP types of architectures or distributed physical memory such as that used with CCNUMA types of architectures. Such a method includes creating a pinned virtual memory range database in which is stored virtual memory address information corresponding to pinned physical memory for each applications program being run on the computer system. Also featured is an operating system for execution with a multiprocessor computer system and a multiprocessor computer including such an operating system for execution therein.

Claims

1. A method for reducing overhead associated with system input/output (I/O) operations in a computer system having a plurality of processors and a physical memory accessed and used by the plurality of processors, the method comprising the step of:

creating a pinned virtual memory range database in which is stored virtual memory address information corresponding to pinned physical memory for at least one applications program being run on the computer system, before I/O operations begin for the at least one applications program.

2. A method for reducing overhead associated with system input/output

(I/O) operations in a computer system having a plurality of processors and a physical memory accessed and used by the plurality of processors, the method comprising the steps of:

pinning a portion of the physical memory corresponding to identified virtual memory addresses of at least one applications program being loaded onto the computer system; and

creating a pinned virtual memory range database in which is stored virtual memory address information corresponding to pinned physical memory for said at least one applications program being run on the computer system that includes the identified virtual memory addresses, said creating being performed at either of when each of the at least one applications program is loaded onto the computer system or before an I/O operation for the at least one applications program.

3. The method according to claim 2, further comprising the steps of:

determining, using the pinned virtual memory range database, that the virtual memory address for data/information to be transferred thereto/therefrom corresponds to pinned physical memory; and

transferring data/information to/from pinned physical memory, when said determining determines that the virtual memory address corresponds to pinned physical memory.

4. The method according to claim 3 further comprising the steps of:

un-pinning the pinned physical memory of each of the at least one applications program being unloaded from the computer system; and

removing the virtual address information corresponding to the pinned physical memory being unpinned.

5. The method according to claim 3, wherein said step of determining is performed by each processor responsive to the initiation of an I/O operation by said each processor.

6. The method according to claim 3, wherein said step of determining includes marking an I/O buffer after determining that that the virtual memory address corresponds to pinned physical memory.

7. The method according to claim 3, wherein said step of determining includes the steps of:

looking-up an I/O buffer address range in the pinned virtual memory range database;

determining if the I/O buffer address range corresponds to a virtual memory address range that is pinned physical memory;

recording the mapping of the physical memory address range that corresponds to the identified virtual memory address range; and

marking the I/O buffer.

8. The method according to claim 7, wherein said steps of looking-up, determining if the I/O buffer address range corresponds to a virtual memory address range that is pinned physical memory, recording and marking, is performed by each processor responsive to the initiation of an I/O operation by said each processor.

9. The method according to claim 7, wherein said step of determining further comprises the steps of:

obtaining a local lock of the pinned virtual memory range database prior to said step of looking-up; and

releasing the lock on the pinned virtual memory range database following said step of marking the I/O buffer.

10. The method according to claim 7, wherein said method further comprises the step of un-marking the I/O buffer following transfer of the data/information.

11. The method according to claim 7, wherein following a determination that the I/O buffer address range does not corresponds to a virtual memory address range for pinned physical memory, said step of determining includes the steps of:

obtaining a system-wide memory lock;

mapping the physical memory address range corresponding to the virtual memory address range that were not pinned;

pinning the mapped physical memory; and

releasing the system-wide memory lock.

12. The method according to claim 11, wherein, following said step of transferring, said method further comprises the step of unpinning the pinned physical memory for the virtual memory address range that had not been pinned when the I/O operation was initiated.

13. The method according to claim 11, wherein, following said step of transferring, said method further comprises the steps of:

determining if the pinned virtual memory range database should be updated to include additional virtual memory addresses that were not been pinned when the I/O operation was initiated;

if it is determined that the pinned virtual memory range database should be updated, then updating the database to include the additional virtual memory addresses; and

if it is determined that the pinned virtual memory range database should not be updated, then unpinning the pinned physical memory for the virtual memory address range that had not been pinned when the I/O operation was initiated.

14. A computer program product comprising:

a computer-readable medium bearing program code for an operating system of a multi-processor computer system, the program code including;

a first computer-readable program code segment for causing the computer system to create a pinned virtual memory range database in which is stored virtual memory address information corresponding to pinned physical memory for at least one applications program being run on the computer system, before I/O operations begin for the at least one applications program.

15. A computer program product comprising:

a computer-readable medium bearing program code for an operating system of a multi-processor computer system, the program code including;

a first computer-readable program code segment for causing the computer system to create a pinned virtual memory range database in which is stored virtual memory address information corresponding to pinned physical memory for at least one applications program being run on the computer system; and

wherein the first code segment includes instructions and criteria to;

(1a) pin a portion of the physical memory corresponding to identified virtual memory addresses of each of the at least one applications program being loaded onto the computer system and

(1b) create the pinned virtual memory range database that includes these virtual memory addresses, where the pinned virtual memory range data base is created at either of when each of the at least one applications program is loaded onto the computer system or before an I/O operation for the at least one applications program.

16. The computer program product of claim 15, wherein the first code segment further includes instructions and criteria to:

(1c) un-pin the pinned physical memory of each of the at least one applications program being unloaded from the computer system and

(1d) remove the virtual address information corresponding to the pinned physical memory being unpinned.

17. The computer program product of claim 15, wherein the program code further includes a second computer-readable program code segment for processing input/output operations of the computer system, wherein the second code segment comprises instructions and criteria to:

(2a) determine, using the pinned virtual memory range database, that the virtual memory address for data/information to be transferred thereto/therefrom corresponds to pinned physical memory and

(2b) transfer data/information to/from pinned physical memory, when it is determined that the virtual memory address corresponds to pinned physical memory.

18. The computer program product of claim 17, wherein the second code segment further comprises instructions and criteria that said (2a) is performed by each processor responsive to the initiation of an I/O operation by said each processor.

19. The computer program product of claim 17, wherein said (2a) of the second code segment further comprises instructions and criteria to:

(2a1) look-up an I/O buffer address range in the pinned virtual memory range database,

(2a2) determine if the I/O buffer address range corresponds to a virtual memory address range that is pinned physical memory,

(2a3) record the mapping of the physical memory address range that corresponds to the identified virtual memory address range, and

(2a4) marking the I/O buffer.

20. The computer program product of claim 19, wherein the second code segment further comprises instructions and criteria that said (2a1)-(2a4) are performed by each processor responsive to the initiation of an I/O operation by said each processor.

21. The computer program product of claim 17 wherein the second code segment further includes instructions and criteria to:

(2c) mark an I/O buffer after determining that that the virtual memory address corresponds to pinned physical memory, and

(2d) un-mark the I/O buffer following transfer of the data/information.

22. The computer program product of claim 17 further including a third computer-readable code segment for processing an I/O operation when it is determined by the second code segment that the I/O buffer address range does not correspond to a virtual memory address range for pinned physical memory, wherein the third code segment comprises instructions and criteria to:

(3a) pin additional physical memory pages, including;

(3a1) obtaining a system-wide memory lock,

(3a2) mapping the physical memory address range corresponding to the virtual memory address range that were not pinned,

(3a3) pinning the mapped physical memory, and

(3a4) releasing the system-wide memory lock; and

(3b) unpin the additional physical memory pages following transfer of the data/ information, including;

(3b1) obtaining a system-wide memory lock,

(3b2) un-pin each of the additional physical memory pages, and

(3b3) releasing the system-wide memory lock.

23. The computer program product of claim 22 further including a fourth computer-readable code segment for determining if the pinned virtual memory range database should be updated to include additional virtual memory addresses that were not been pinned when the I/O operation was initiated, the fourth code segment including instructions and criteria to:

(4a) update the database to include the additional virtual memory addresses, if it is determined that the pinned virtual memory range database should be updated, and

(4b) perform said (3b) if it is determined that the pinned virtual memory range database should not be updated.

24. A multiprocessor computer system comprising:

a plurality of processors;

a physical memory accessed and used by the plurality of processors;

program code for execution within the plurality of processors; and

wherein the program code comprises criteria and a sequence of instructions to create a pinned virtual memory range database in which is stored virtual memory address information corresponding to pinned physical memory for at least one applications program being run on the computer system, before I/O operations begin for the at least one applications program.

25. A multiprocessor computer system comprising:

a plurality of processors;

a physical memory accessed and used by the plurality of processors;

program code for execution within the plurality of processors; and

wherein the program code comprises criteria and a sequence of instructions to;

create a pinned virtual memory range database in which is stored virtual memory address information corresponding to pinned physical memory for at least one applications program being run on the computer system,

pin a portion of the physical memory corresponding to identified virtual memory addresses of each of the at least one applications program being loaded onto the computer system, and

wherein the criteria and sequence of instructions to create a pinned virtual memory range database includes creating the pinned virtual memory range database that includes the identified virtual memory addresses, and wherein the pinned virtual memory range data base is created at either of when each of the at least one applications program is loaded onto the computer system or before an I/O operation for the at least one applications program.

26. The multiprocessor computer system of claim 25, wherein the program code further includes criteria and a sequence of instructions to process input/output (I/O) operations of the computer system;

the criteria and sequence of instructions for processing I/O operations including;

determining, using the pinned virtual memory range database, that the virtual memory address for data/information to be transferred thereto/therefrom corresponds to pinned physical memory, and

transferring data/information to/from pinned physical memory, when said determining determines that the virtual memory address corresponds to pinned physical memory.

27. The multiprocessor computer system of claim 26, wherein the criteria and sequence of instructions for processing I/O operations further comprises having said determining that the virtual memory address for data/information to be transferred thereto/therefrom corresponds to pinned physical memory performed by each processor responsive to the initiation of an I/O operation by said each processor.