No-flow underfill material and underfill method for flip chip devices

• US 6,660,560 B2
• Filed: 09/10/2001
• Issued: 12/09/2003
• Est. Priority Date: 09/10/2001
• Status: Expired due to Term

• Current Assignee: Delphi Technologies Ip Limited (BorgWarner Incorporated)
• Original Assignee: Delphi Technologies, Inc. (BorgWarner Incorporated)
• Inventors: Workman, Derek B., Walsh, Matthew R., Chaudhuri, Arun K.
• Primary Examiner(s): Fahmy, Wael
• Assistant Examiner(s): BEREZNY, NEMA O
• Application Number:
  US09/949,556
• Publication Number:
  US 20030049411A1
• Time in Patent Office: 820 Days
• Field of Search: 438/109, 438/108, 438/118, 257/778, 257/795
• US Class Current: 438/108
• CPC Class Codes: B32B 3/10 characterised by a discontinuous layer, i.e. formed of separate pieces of material
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/2908 being stacked
• CPC Class Codes: H01L 2224/29083 Three-layer arrangements
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29386 with a principal constituent of the material being a non metallic, non metalloid inorganic material
• CPC Class Codes: H01L 2224/29499 Shape or distribution of the fillers
• CPC Class Codes: H01L 2224/325 Material
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/83192 wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01007 Nitrogen [N]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/05442 : SiO2
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: Y10T 428/24322 : Composite web or sheet
• CPC Class Codes: Y10T 428/24331 : including nonapertured component

Abstract

A no-flow underfill material and process for underfilling a flip chip component. The underfill material comprises at least three polymer layers. A first of the layers overlies terminals of a substrate to which the component is to be mounted. The first and second layers are substantially free of fillers, while the third layer contains a filler material to reduce its CTE. The underfill process entails placing the component so that solder terminals thereof penetrate the first, second and third layers and contact the terminals on the substrate. Because only the third layer contains filler material, penetration of the underfill material by the solder terminals is substantially unimpeded. The solder terminals are then reflowed, during which the filler material migrates into the unfilled first layer and the first, second and third layers consolidate and cure to form a single underfill layer.

Claims

1. A method of underfilling a flip chip component with a no-flow underfill material, the method comprising the steps of:

forming the no-flow underfill material to comprise a first layer of an uncured first polymer dielectric material on a terminal of a circuit substrate, a second layer of an uncured second polymer dielectric material on the first layer, and a third layer comprising an uncured third polymer dielectric material on the second layer, the first and second layers being substantially free of a particulate filler, the third layer containing a particulate filler material having a CTE lower than the CTE of the third polymer dielectric material;

penetrating the first, second and third layers with a solder terminal of the flip chip component so that the solder terminal contacts the terminal;

heating the first, second and third layers and the solder terminal so that the solder terminal melts, the particulate filler material in the third layer migrates into the first layer, and the first, second and third layers consolidate and cure to form a single underfill layer, and then

cooling the molten solder terminal and the underfill layer so that the molten solder terminal forms a solid electrical interconnect that is metallurgically bonded to the terminal and the underfill layer encapsulates the interconnect and contacts both the flip chip component and the circuit substrate.

2. The method according to claim 1, wherein the second and third polymer dielectric materials have the same composition.

3. The method according to claim 1, wherein the first layer further contains a fluxing compound.

4. The method according to claim 1, wherein the particulate filler material is selected from the group consisting of silica, silicon nitride, silicon carbide, aluminum nitride and boron nitride.

5. The method according to claim 1, wherein the second polymer dielectric material has a higher viscosity than the first polymer dielectric material, and the first layer remains substantially free of particulate filler material immediately after the penetrating step.

6. The method according to claim 5, wherein the third polymer dielectric material has a higher viscosity than the second polymer dielectric material.

7. The method according to claim 1, wherein the underfill layer has a CTE of about 18 to about 32 ppm/°

C.

8. A method of underfilling a flip chip with a no-flow underfill material, the method comprising the steps of:

depositing a first layer of an uncured first adhesive material on a terminal of a circuit substrate, the first layer containing a flux compound but being substantially free of a particulate filler having a CTE lower than the CTE of the first adhesive material;

depositing a second layer of an uncured second adhesive material on the first layer, the second adhesive material having a higher viscosity than the first adhesive material, the second layer being substantially free of a particulate filler having a CTE lower than the CTE of the second adhesive material;

depositing a third layer of an uncured third adhesive material on the second layer, the third adhesive material having a higher viscosity than the second adhesive material, the third layer containing a particulate filler material having a GTE lower than the CTE'"'"'s of the first, second and third adhesive materials;

penetrating the first, second and third layers with a solder bump of the flip chip so that the solder bump contacts the terminal;

heating the first, second and third layers and the solder bump so that the solder bump melts, the particulate filler material in the third layer migrates into the first layer, and the first, second and third layers consolidate and cure to form a single underfill layer, and then

cooling the molten solder bump and the underfill layer so that the molten solder bump forms a solid electrical interconnect that is metallurgically bonded to the terminal and the underfill layer encapsulates the interconnect and contacts both the flip chip and the circuit substrate.

9. The method according to claim 8, further comprising the step of warming the first, second and third layers prior to the penetrating step to facilitate penetration of the first, second and third layers by the solder bump, wherein the second layer accommodates substantially any of the particulate filler material that migrates from the third layer toward the first layer as a result of the warming step, and the first layer remains substantially free of particulate filler material immediately after the penetrating step.

10. The method according to claim 8, wherein the underfill layer has a GTE of about 18 to about 32 ppm/°

C.

11. The method according to claim 8, wherein the particulate filler material of the third layer is selected from the group consisting of silica, silicon nitride, silicon carbide, aluminum nitride and boron nitride.