Graphics display system with video scaler

• US 6,661,427 B1
• Filed: 11/09/1999
• Issued: 12/09/2003
• Est. Priority Date: 11/09/1998
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: MacInnis, Alexander G., Tang, Chengfuh Jeffrey, Kranawetter, Greg A., Patterson, James T., Xie, Xiaodong
• Primary Examiner(s): Brier, Jeffery
• Assistant Examiner(s): GOOD JOHNSON, MOTILEWA
• Application Number:
  US09/437,326
• Time in Patent Office: 1,491 Days
• Field of Search: 345/660, 345/667
• US Class Current: 345/660
• CPC Class Codes: G06F 3/0611 in relation to response time
• CPC Class Codes: G06F 3/0653 Monitoring storage devices or systems
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0683 Plurality of storage devices
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G06T 1/60 Memory management
• CPC Class Codes: G06T 9/00 Image coding bandwidth or redundancy reduction for static pictures H04N1/41; coding or decoding of static colour picture signals H04N1/64; methods or arrangements for coding, decoding, compressing or decompressing digital video signals H04N19/00
• CPC Class Codes: G06T 9/007 Transform coding, e.g. discrete cosine transform
• CPC Class Codes: G09G 2310/0224 Details of interlacing
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2340/02 Handling of images in compressed format, e.g. JPEG, MPEG
• CPC Class Codes: G09G 2340/0407 Resolution change, inclusive of the use of different resolutions for different screen areas
• CPC Class Codes: G09G 2340/10 Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
• CPC Class Codes: G09G 2340/125 wherein one of the images is motion video
• CPC Class Codes: G09G 2360/02 Graphics controller able to handle multiple formats, e.g. input or output formats
• CPC Class Codes: G09G 2360/121 using a cache memory
• CPC Class Codes: G09G 2360/125 using unified memory architecture [UMA]
• CPC Class Codes: G09G 2360/126 The frame memory having additional data ports, not inclusive of standard details of the output serial port of a VRAM
• CPC Class Codes: G09G 2360/128 Frame memory using a Synchronous Dynamic RAM [SDRAM]
• CPC Class Codes: G09G 5/001 Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
• CPC Class Codes: G09G 5/02 : characterised by the way in which colour is displayed details of colour display specific for CRTs G09G1/28; specific for flat matrix panels other than liquid crystal displays G09G3/2003; specific for liquid crystal displays G09G3/3607
• CPC Class Codes: G09G 5/024 : using colour registers, e.g. to control background, foreground, surface filling G09G5/06 takes precedence
• CPC Class Codes: G09G 5/026 : Control of mixing and/or overlay of colours in general G09G5/022 and G09G5/024 take precedence
• CPC Class Codes: G09G 5/06 : using colour palettes, e.g. look-up tables
• CPC Class Codes: G09G 5/12 : Synchronisation between the display unit and other units, e.g. other display units, video-disc players
• CPC Class Codes: G09G 5/14 : Display of multiple viewports
• CPC Class Codes: G09G 5/28 : for enhancement of character form, e.g. smoothing
• CPC Class Codes: G09G 5/346 : for systems having a bit-mapped display memory
• CPC Class Codes: G09G 5/36 : characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
• CPC Class Codes: G09G 5/363 : Graphics controllers
• CPC Class Codes: H04N 11/143 : Encoding means therefor H04N11/16 takes precedence
• CPC Class Codes: H04N 11/20 : Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
• CPC Class Codes: H04N 19/42 : characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation H04N19/635 takes precedence
• CPC Class Codes: H04N 19/423 : characterised by memory arrangements H04N19/433 takes precedence
• CPC Class Codes: H04N 19/436 : using parallelised computational arrangements
• CPC Class Codes: H04N 19/44 : Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
• CPC Class Codes: H04N 19/59 : involving spatial sub-sampling or interpolation, e.g. alteration of picture size or resolution
• CPC Class Codes: H04N 19/61 : in combination with predictive coding
• CPC Class Codes: H04N 21/42204 : User interfaces specially adapted for controlling a client device through a remote control device; Remote control devices therefor constructive details of casings for the remote control device H01H9/0235; user interfaces for controlling a tuning device of a television receiver through a remote control H03J9/00; remote control of peripheral devices connected to a television receiver through the remote control device of the television receiver H04B1/205
• CPC Class Codes: H04N 21/426 : Internal components of the client ; Characteristics thereof H04N5/44 takes precedence
• CPC Class Codes: H04N 21/42653 : for processing graphics
• CPC Class Codes: H04N 21/4305 : Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083
• CPC Class Codes: H04N 21/4316 : for displaying supplemental content in a region of the screen, e.g. an advertisement in a separate window
• CPC Class Codes: H04N 21/434 : Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream demultiplexing of data packets for data networks, e.g. RTP/UDP H04L65/00
• CPC Class Codes: H04N 21/440263 : by altering the spatial resolution, e.g. for displaying on a connected PDA
• CPC Class Codes: H04N 21/4438 : Window management, e.g. event handling following interaction with the user interface
• CPC Class Codes: H04N 21/47 : End-user applications
• CPC Class Codes: H04N 5/04 : Synchronising for television systems using pulse code modulation H04N7/56
• CPC Class Codes: H04N 5/126 : whereby the synchronisation signal indirectly commands a frequency generator
• CPC Class Codes: H04N 5/14 : Picture signal circuitry for video frequency region cameras or camera modules comprising electronic image sensors, or control thereof H04N23/00
• CPC Class Codes: H04N 5/44504 : Circuit details of the additional information generator, e.g. details of the character or graphics signal generator, overlay mixing circuits
• CPC Class Codes: H04N 5/45 : Picture in picture , e.g. displaying simultaneously another television channel in a region of the screen
• CPC Class Codes: H04N 5/46 : for receiving on more than one standard at will deflecting circuits of multi-standard receivers H04N3/27
• CPC Class Codes: H04N 7/0122 : the input and the output signals having different aspect ratios
• CPC Class Codes: H04N 7/0135 : involving interpolation processes interpolation-based image scaling G06T3/4007; interpolation for video coding H04N19/587, H04N19/59
• CPC Class Codes: H04N 9/45 : Generation or recovery of colour sub-carriers
• CPC Class Codes: H04N 9/641 : Multi-purpose receivers, e.g. for auxiliary information H04N9/642 takes precedence
• CPC Class Codes: H04N 9/642 : Multi-standard receivers

Abstract

A graphics integrated circuit chip is used in a set-top box for controlling a television display. The graphics chip processes analog video input, digital video input, graphics input and audio input simultaneously. A video scaling system preferably conserves memory by downscaling video prior to capturing the video in memory and upscaling video after the video is called out of memory.

Claims

1. In a video scaling system comprising a scaler engine, a memory, and first, second and third multiplexers, a method of scaling a video image comprising:

receiving the video image;

determining whether it requires less memory space to scale the video image before writing the video image to the memory or after reading the video image from the memory;

if it requires less memory space to scale the video image before writing the video image to the memory;

a) providing the video image to the first multiplexer, wherein an output of the first multiplexer is coupled to the scaler engine;

b) scaling the video image with the scaler engine to generate a first scaled video image;

c) providing the first scaled video image to the second multiplexer, wherein an output of the second multiplexer is coupled to the memory;

d) writing the first scaled video image to the memory;

e) reading the first scaled video image from the memory; and

f) providing the first scaled video image to the third multiplexer; and

if it requires less memory space to scale the video image after reading the video image from the memory;

g) providing the video image to the second multiplexer, wherein the output of the second multiplexer is coupled to the memory;

h) writing the video image to the memory;

i) reading the video image from the memory;

j) providing the video image to the first multiplexer, wherein the output of the first multiplexer is coupled to the scaler engine;

k) scaling the video image with the scaler engine to generate a second scaled video image; and

l) providing the second scaled video image to the third multiplexer; and

outputting the first or second scaled video image from the third multiplexer as an output of the video scaling system.

2. The method of scaling a video image of claim 1 wherein the scaler engine comprises a vertical scaler and a horizontal scaler.

3. The method of scaling a video image of claim 2 further comprising the step of programming the horizontal scaler for upscaling.

4. The method of scaling a video image of claim 2 further comprising the step of programming the horizontal scaler for downscaling.

5. The method of scaling a video image of claim 2 further comprising the step of programming the vertical scaler for upscaling.

6. The method of scaling a video image of claim 2 further comprising the step of programming the vertical scaler for downscaling.

7. The method of scaling a video image of claim 1, wherein scaling the video image comprises scaling the video image up or down horizontally or vertically.

8. The method of scaling a video image of claim 1, wherein determining whether it requires less memory space comprises determining whether the video image is to be downscaled or upscaled.

9. A video scaler comprising:

an input for receiving a video image;

a scaler engine capable of both downscaling the video image to generate a first scaled video image and upscaling the video image to generate a second scaled video image;

a memory capable of storing the video image or the first scaled video image;

means for determining whether the video image is to be downscaled or upscaled;

a second multiplexer capable of receiving the video image to be upscaled from the input, receiving the first scaled video image from the scaler engine, and providing the video image to be upscaled or the first scaled video image to the memory;

a first multiplexer capable of receiving the video image to be downscaled from the input, receiving the video image to be upscaled from the memory, and providing the video image to be downscaled or the video image to be upscaled to the scaler engine; and

a third multiplexer capable of receiving the first scaled video image from the memory, receiving the second scaled video image from the scaler engine, and outputting either the first scaled video image or the second scaled video image.

10. The video scaler of claim 9 further comprising a plurality of line buffers for providing the video image to the input.

11. The video scaler of claim 9 wherein the scaler engine comprises a horizontal scaler and a vertical scaler.

12. The video scaler of claim 11 wherein at least one of the horizontal scaler and the vertical scaler comprises a programmable filter.

13. The video scaler of claim 11 wherein at least one of the horizontal scaler and the vertical scaler comprises a multi-tap polyphase filter.

14. The video scaler of claim 11 wherein the horizontal scaler is a filter having eight taps.

15. The video scaler of claim 12 further comprising at least one of a horizontal coefficient memory for storing horizontal filter coefficients for the horizontal scaler and a vertical coefficient memory for storing vertical filter coefficients for the vertical scaler.

16. The video scaler of claim 14 further comprising an eight-tap shift register for providing input to the eight taps of the filter.

17. The video scaler of claim 11 wherein the vertical scaler is a filter having four taps.

18. The video scaler of claim 17 further comprising a plurality of line buffers, wherein inputs to the four taps of the filter are provided by three of the line buffers and an incoming line of the video image.

19. The video scaler of claim 9, wherein the scaler engine is a single physical device that is logically in both an upscale path and a downscale path of the video image.

20. The video scaler of claim 19, wherein the scaler engine comprises at least one of programmable vertical scaler filter and a horizontal scaler filter.

21. The video scaler of claim 20, wherein the scaler engine further comprises at least one of a vertical coefficient memory for storing vertical coefficients for upscaling or downscaling and a horizontal coefficient memory for storing horizontal coefficients for upscaling or downscaling.

22. The video scaler of claim 9, further comprising a fourth multiplexer capable of receiving and selecting between a digital video image and a digitized analog video image, and outputs the selected one of the digital video image and the digitized analog video image as the video image.

23. In a video scaling system comprising a scaler engine, a memory, and first, second and third multiplexers, a method of scaling a video image comprising:

receiving the video image;

determining whether it requires less memory bandwidth to scale the video image before writing the video image to the memory or after reading the video image from the memory;

if it requires less memory bandwidth to scale the video image before writing the video image to the memory;

a) providing the video image to the first multiplexer, wherein an output of the first multiplexer is coupled to the scaler engine;

b) scaling the video image with the scaler engine to generate a first scaled video image;

c) providing the first scaled video image to the second multiplexer, wherein an output of the second multiplexer is coupled to the memory;

d) writing the first scaled video image to the memory;

e) reading the first scaled video image from the memory; and

f) providing the first scaled video image to the third multiplexer; and

if it requires less memory bandwidth to scale the video image after reading the video image from the memory;

g) providing the video image to the second multiplexer, wherein the output of the second multiplexer is coupled to the memory;

h) writing the video image to the memory;

i) reading the video image from the memory;

j) providing the video image to the first multiplexer, wherein the output of the first multiplexer is coupled to the scaler engine;

k) scaling the video image with the scaler engine to generate a second scaled video image; and

l) providing the second scaled video image to the third multiplexer; and

outputting the first or second scaled video image from the third multiplexer as an output of the video scaling system.

24. The method of scaling a video image of claim 23, wherein determining whether less memory bandwidth is used comprises determining whether the video image is to be downscaled or upscaled.

25. The method of scaling a video image of claim 23, further comprising blending said first or second scaled video image with a graphics image to generate a blended video and graphics image.