Method and apparatus for reducing power dissipation in finite field arithmetic circuits
First Claim
1. A method for reducing power dissipation of a finite field arithmetic circuit having first and second circuit inputs, comprising:
- calculating a first circuit transition probability of said first circuit input by applying a random input to said first circuit input and a constant input to said second circuit input;
calculating a second circuit transition probability of said second circuit input by applying a constant input to said first circuit input and a random input to said second circuit input;
comparing said first circuit transition probability to said second circuit transition probability;
selecting one of said first and second circuit inputs having a lower circuit transition probability;
comparing a first time-varying rate that a first input signal to said arithmetic circuit varies with a second time-varying rate that a second input signal to said arithmetic circuit varies; and
selecting one of said first and second input signals having a higher time-varying rate.
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Accused Products
Abstract
A finite field arithmetic circuit with reduced power dissipation has first and second circuit inputs. A first circuit transition probability of the first circuit input is calculated by applying a random input to the first circuit input and a constant input to the second circuit input. A second circuit transition probability of the second circuit input is calculated by applying a constant input to the first circuit input and a random input to the second circuit input. One of the first and second circuit inputs having a lower circuit transition probability is selected. A first time-varying rate that a first input signal to the arithmetic circuit varies is compared with a second time-varying rate that a second input signal to the arithmetic circuit varies. The input signal having a higher time-varying rate is selected and coupled to the selected one of the first and second circuit inputs.
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Citations
38 Claims
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1. A method for reducing power dissipation of a finite field arithmetic circuit having first and second circuit inputs, comprising:
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calculating a first circuit transition probability of said first circuit input by applying a random input to said first circuit input and a constant input to said second circuit input;
calculating a second circuit transition probability of said second circuit input by applying a constant input to said first circuit input and a random input to said second circuit input;
comparing said first circuit transition probability to said second circuit transition probability;
selecting one of said first and second circuit inputs having a lower circuit transition probability;
comparing a first time-varying rate that a first input signal to said arithmetic circuit varies with a second time-varying rate that a second input signal to said arithmetic circuit varies; and
selecting one of said first and second input signals having a higher time-varying rate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A finite field arithmetic circuit comprising:
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a first circuit input having a first circuit transition probability;
a second circuit input having a second circuit transition probability, wherein said second circuit transition probability is lower that said first circuit transition probability;
a first input that generates a first input signal to said first circuit input of said finite field arithmetic circuit that has a first time-varying rate; and
a second input that generates a second input signal to said second circuit input of said finite field arithmetic circuit, wherein said second input signal has a second time-varying rate that is higher than said first time-varying rate. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A method for reducing power dissipation of a finite field arithmetic circuit having first and second circuit inputs, comprising:
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calculating a first circuit transition probability of said first circuit input by applying a random input to said first circuit input and a constant input to said second circuit input;
calculating a second circuit transition probability of said second circuit input by applying a constant input to said first circuit input and a random input to said second circuit input;
comparing said first circuit transition probability to said second circuit transition probability;
selecting one of said first and second circuit inputs having a higher circuit transition probability;
comparing a first time-varying rate that a first input signal to said arithmetic circuit varies with a second time-varying rate that a second input signal to said arithmetic circuit varies; and
selecting one of said first and second input signals having a lower time-varying rate. - View Dependent Claims (26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38)
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Specification