Method and apparatus to implement logical partitioning of PCI I/O slots

• US 6,665,759 B2
• Filed: 03/01/2001
• Issued: 12/16/2003
• Est. Priority Date: 03/01/2001
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Lee, Van Hoa, Randall, David Lee, Dawkins, George John, Tran, Kiet Anh
• Primary Examiner(s): Gaffin, Jeffrey
• Assistant Examiner(s): Nguyen, Mike
• Application Number:
  US09/798,294
• Publication Number:
  US 20020124127A1
• Time in Patent Office: 1,020 Days
• Field of Search: 710/1-28, 710/200, 710/308, 710/312-315, 711/147-153
• US Class Current: 710/200
• CPC Class Codes: G06F 13/28 using burst mode transfer, e.g. direct memory access DMA, cycle steal G06F13/32 takes precedence

Abstract

A method, system, and computer program product for enforcing logical partitioning of input/output slots within a data processing system is provided. In one embodiment, the system includes a hypervisor and at least one DMA address checking component. The hypervisor receives non-direct-memory-access requests for access to input/output slots and prohibits devices within one logical partition from accessing the input/output slots assigned to a different logical partition. The DMA address checking component receives direct-memory-access requests and prohibits requests for addresses not within the same logical partition as the requesting device from being completed. Requests with addresses corresponding to the same logical partition as the requesting device are placed on the primary PCI bus by the DMA address checking component for delivery to the system memory.

Claims

1. A system for enforcing logical partitioning of input/output slots within a logically partitioned data processing system, the system comprising:

said logically partitioned system including a hypervisor that permits simultaneous execution of independent operating system images in the logically partitioned system by creating and enforcing partitioning of a logically partitioned platform that includes processors, memory, and input/output slots,

said hypervisor which receives non-direct-meniory-access requests for access to input/output slots, determines a partition identifier of a requesting device that generated a request, and uses said partition identifier to prohibits devices within one logical partition from accessing the input/output slots assigned to a different logical partition;

at least one DMA address checking component which receives requests, determines whether said requests are direct-memory-access requests for access to said input/output slots, prohibits non-direct-memory-access request from reaching a primary bus coupled to said input/output slots, and prohibits requests for addresses not within the same logical partition as the requesting device from being completed; and

said hypervisor, for processing said non-direct-memory access requests for access to said input/output slots and said DMA address checking component for processing said direct-memory-access requests for access to said input/output slots, said hypervisor and said DMA address checking component being separate devices.

2. The system as recited in claim 1, wherein the hypervisor is implemented as firmware.

3. The system as recited in claim 1, wherein the DMA address checking component is implemented as hardware.

4. The system as recited in claim 1, wherein non-direct-memory-access requests received by the DMA address checking component are rejected.

5. The system as recited in claim 1, wherein the DMA address checking component forwards direct memory access requests having addresses belonging to the same logical partition as the requesting device to a primary bus for delivery to a system memory.

6. The system as recited in claim 1, wherein the input/output slots are peripheral component interconnect input/output slots.

7. The system as recited in claim 5, wherein the primary bus is a primary peripheral component interconnect bus.

8. A method for enforcing logical partitioning of direct memory access addresses within a logically partitioned data processing system, the method comprising:

said logically partitioned system including a hypervisor that permits simultaneous execution of independent operating system images in the logically partitioned system by creating and enforcing partitioning of a logically partitioned platform that includes processors, memory, and input/output slots,

receiving a request within said hypervisor from a requesting device to access an input/output slot address;

determining, by said hypervisor, a partition identifier of said requesting device;

using, by said hypervisor, said partition identifier to prohibit devices within one logical partition from accessing the input/output slots assigned to a different logical partition;

responsive to a determination that the request is a direct memory access operation, determining, by a DMA address checking component, whether the address is assigned to the same partition as the requesting device;

responsive to a determination that the address is assigned to a different partition as the requesting device, denying by said DMA address checking component, access to the address; and

processing non-direct-memory access requests by said hypervisor and processing direct memory access requests by said DMA address checking component.

9. The method as recited in claim 8, further comprising:

responsive to a determination that the address belongs to the same partition as the requesting device, forwarding the request to a system memory.

10. The method as recited in claim 8, further comprising:

responsive to a determination that the request is not a direct memory access operation, rejecting the operation.

11. The method as recited in claim 8, wherein the requesting device is a peripheral component interconnect master agent.

12. The method as recited in claim 10, further comprising:

responsive to a determination by the hypervisor that the address is assigned to a different partition from that to which the requesting device is assigned, denying the request.

13. The method as recited in claim 10, further comprising:

responsive to a determination by the hypervisor that the address is assigned to the same partition as that to which the requesting device is assigned, allowing the request to proceed.

14. A computer program product in a computer readable media for use in a logically partitioned data processing system for enforcing logical partitioning of direct memory access addresses within the data processing system, the computer program product comprising:

said logically partitioned system including a hypervisor that permits simultaneous execution of independent operating system images in the logically partitioned system by creating and enforcing partitioning of a logically partitioned platform that includes processors, memory, and input/output slots,

instructions for receiving a request within said hypervisor from a requesting device to access an input/output slot address;

instructions for determining, by said hypervisor, a partition identifier of said requesting device;

instructions for using, by said hypervisor, said partition identifier to prohibit devices within one logical partition from accessing the input/output slots assigned to a different logical partition;

instructions, responsive to a determination that the request is a direct memory access operation, for determining, by a DMA address checking component, whether the address is assigned to the same partition as the requesting device;

instructions, responsive to a determination that the address is assigned to a different partition as the requesting device, for denying, by said DMA address checking component access to the address; and

instructions for processing non-direct-memory-access requests by said hypervisor and for processing direct-memory-access-requests by said DMA address checking component.

15. The computer program product as recited in claim 14, further comprising:

instructions, responsive to a determination that the address belongs to the same partition as the requesting device, for forwarding the request to a system memory.

16. The computer program product as recited in claim 14, further comprising:

instructions, responsive to a determination that the request is not a direct memory access operation, for rejecting the request.

17. The computer program product as recited in claim 14, wherein the requesting device is a peripheral component interconnect master agent.

18. The computer program product as recited in claim 16, further comprising:

instructions, responsive to a determination by the hypervisor that the address is assigned to a different partition from that to which the requesting device is assigned, for denying the request.

19. The computer program product as recited in claim 16, further comprising:

instructions, responsive to a determination by the hypervisor that the address is assigned to the same partition as that to which the requesting device is assigned, for allowing the request to proceed.