Power management and control for a microcontroller
DCFirst Claim
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1. A microcontroller management system, comprising:
- a bus;
a power management subsystem configured to send a global power management command to one or more microcontroller subsystems through the bus, the global power management command to control power modes of the one or more microcontroller subsystems;
one or more bus interfaces corresponding to the one or more microcontroller subsystems, each bus interface coupling a corresponding microcontroller subsystem to the bus, each bus interface to receive the global power management command, each bus interface including a register for configuring a response of a corresponding microcontroller subsystems to the global power management commands, the response of a corresponding microcontroller subsystem being independent of responses of other ones of the one or more microcontroller subsystems to the global power management command; and
an application to configure each register to optimize the response of a corresponding microcontroller subsystem to the global power management command.
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Abstract
A power management system for a microcontroller. The power management system includes a power management state machine for controlling a power mode of a central processing unit (CPU) and each subsystem within the microcontroller. Each microcontroller subsystem is connected to the system through a configurable peripheral interface (FPI). Each FPI includes a software configuration register (SFR) that can be configured by an operating system or application program. The SFR for the various FPIs can be preconfigured to allow the response to each of the power modes of the power management state machine to be independently controlled for each subsystem.
268 Citations
23 Claims
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1. A microcontroller management system, comprising:
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a bus;
a power management subsystem configured to send a global power management command to one or more microcontroller subsystems through the bus, the global power management command to control power modes of the one or more microcontroller subsystems;
one or more bus interfaces corresponding to the one or more microcontroller subsystems, each bus interface coupling a corresponding microcontroller subsystem to the bus, each bus interface to receive the global power management command, each bus interface including a register for configuring a response of a corresponding microcontroller subsystems to the global power management commands, the response of a corresponding microcontroller subsystem being independent of responses of other ones of the one or more microcontroller subsystems to the global power management command; and
an application to configure each register to optimize the response of a corresponding microcontroller subsystem to the global power management command. - View Dependent Claims (2, 3, 4)
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5. A microcontroller, comprising:
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a CPU core;
a bus;
a plurality of peripheral devices, each peripheral device including a bus interface and configured to communicate with the CPU core through the bus; and
a management subsystem configured to generate and provide power management controls to each of the plurality of peripheral devices through the bus and a corresponding bus interface, the power management controls to control power modes of each of the peripheral devices, wherein the power modes for each of the plurality of peripheral devices is configurable through each corresponding bus interfaces. - View Dependent Claims (6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method of providing power management functions in a microcontroller having one or more subsystems and a CPU core, the method comprising:
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generating a global power management command in a power management subsystem, the global power management command to control power modes of each of the one or more subsystems;
sending the global power management command to each of the one or more subsystems through a bus;
individually configuring a response of each of the one or more subsystems to the global power management command through a corresponding registers in each of the one or more subsystems, and configuring each of the one or more subsystems to support one of RUN, IDLE, SLEEP, and DEEP SLEEP power modes based on the individual response of each of the one or more subsystems. - View Dependent Claims (16, 17, 18)
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19. A System-on-Chip, comprising:
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a modular power management system, the modular power management system including;
a bus;
a power management subsystem configured to send a global power management command to one or more microcontroller subsystems through the bus, the global power management command to control power modes of the one or more microcontroller subsystems; and
one or more bus interfaces corresponding the one or more microcontroller subsystems, each bus interface coupling a corresponding microcontroller subsystem to the bus, each bus interface to receive the global power management command, each bus interface including a register for configuring a response of a corresponding microcontroller subsystem to the global power management command, the response of a corresponding microcontroller subsystem being independent of responses of other ones of the one or more microcontroller subsystems to the global power management command;
wherein the modular power management system can support addition of additional subsystems without a need for a new integrated circuit for the System-on-Chip to be designed. - View Dependent Claims (20, 21)
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22. A power management subsystem for use in a microcontroller or System-on-Chip having one or more subsystems, the power management subsystem comprising:
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a configuration unit configured to send a global power management command to a CPU and the one or more subsystems through a bus, the global power management command to control power modes of the CPU and the one or more subsystems, each of the one or more subsystems to respond independently to the global power management command; and
a register adapted to configure the configuration unit to support a specific application. 23.The power management subsystem of claim 22, wherein the power management subsystem includes a state machine for generating the power management command to control power modes of the CPU and the one or more subsystems.
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23. The power management subsystem of claim 23, wherein the power modes include a RUN mode, an IDLE mode, a SLEEP mode, and a DEEP SLEEP mode.
Specification