×

Input clamp circuit for 5V tolerant and back-drive protection of I/O receivers using CMOS process

  • US 6,670,840 B1
  • Filed: 07/26/2002
  • Issued: 12/30/2003
  • Est. Priority Date: 07/26/2002
  • Status: Active Grant
First Claim
Patent Images

1. A receiver input back-drive protection circuit, comprisinga pass gate between a pad and the receiver input, a bias circuit supplied by a high external pad voltage, wherein the bias circuit serves to control the pass gate during back-drive mode, and a clamp for the receiver input for clamping the receiver input voltage to the level of a supply voltage.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×