Double-ramp ADC for CMOS sensors

• US 6,670,904 B1
• Filed: 08/22/2002
• Issued: 12/30/2003
• Est. Priority Date: 08/22/2002
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Micron Technology, Inc.
• Inventors: Yakovlev, Alexey
• Primary Examiner(s): Young, Brian
• Assistant Examiner(s): LAUTURE, JOSEPH J
• Application Number:
  US10/225,427
• Time in Patent Office: 495 Days
• Field of Search: 341/155, 341/153, 341/118, 341/120, 341/156, 341/164, 341/165, 341/169
• US Class Current: 341/167
• CPC Class Codes: H03M 1/144 the steps being performed sequentially in a single stage, i.e. recirculation type H03M1/141, H03M1/143, H03M1/16 take precedence
• CPC Class Codes: H03M 1/56 Input signal compared with linear ramp
• CPC Class Codes: H04N 25/75 Circuitry for providing, modifying or processing image signals from the pixel array
• CPC Class Codes: H04N 25/78 Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Abstract

A double ramp ADC within an image sensor. The double ramp ADC divides the analog-to-digital conversion process into two steps. During the first step of the conversion, the ADC runs through the potential digital values roughly, using coarse counter steps, and maintains a coarse digital output value. During the second step, the ADC runs through the individual digital values within the range of values associated with the coarse digital value. Thus, the second step runs through the fine digital values associated with the coarse digital value. The coarse and fine digital values are output as the converted digital value of the analog input voltage. The double ramp ADC should reduce the analog-to-digital conversion cycle time by up to 2^(n/2−1) times that of the conventional analog-to-digital conversion cycle using ramp ADCs, where n is a number of bits of digital output (i.e., resolution) of the ADCs.

Claims

1. An image sensor comprising:

an array of pixels organized into a plurality of rows and columns; and

at least one double ramp analog-to-digital converter, said converter inputting an analog signal from at least one of said pixels and converting said analog signal into a digital code, said converter having an n-bit resolution,

wherein the converter converts said analog signal into said digital signal in no more than 2<sup>(n/2−

1)</sup> steps.

2. The image sensor of claim 1, wherein said double ramp analog-to-digital converter converts the analog signal using a two step conversion process.

3. The image sensor of claim 1, wherein said double ramp analog-to-digital converter converts the analog signal by comparing the signal to a first ramp voltage to obtain a first part of the digital code and then comparing the signal to a second ramp voltage to obtain a second part of the digital code.

4. The image sensor of claim 3, wherein the first ramp voltage is a coarse ramp voltage.

5. The image sensor of claim 3, wherein the second ramp voltage is a fine ramp voltage.

6. The image sensor of claim 3, wherein said first part of the digital code corresponds to the most significant bits of the n-bit resolution and said second part of the digital code corresponds to the least significant bits of the n-bit resolution.

7. The image sensor of claim 1 further comprising a plurality of double ramp analog-to-digital converters, each of said converters being connected to a respective column of said array.

8. The image sensor of claim 1 further comprising a plurality of double ramp analog to digital converters, each of said converters being connected to a respective pixel of said array.

9. An image sensor comprising:

an array of pixels organized into a plurality of rows and columns;

at least one double ramp analog-to-digital converter, said converter inputting an analog signal from at least one of said pixels and converting said analog signal into a digital code; and

a control circuit for controlling an operation of said double ramp analog-to-digital converter, said control circuit causing said analog-to-digital converter to convert the analog signal using a two step conversion process,

wherein during a first step of the conversion process said control circuit sends a gradually decreasing first voltage to said converter until said converter indicates that the first voltage is less than a voltage of the analog signal.

10. The image sensor of claim 9 wherein said control circuit latches a first portion the digital code when said converter indicates that the first voltage is less than the voltage of the analog signal.

11. The image sensor of claim 9 wherein during a second step of the conversion process said control circuit sends a gradually increasing second voltage to said converter until said converter indicates that the second voltage is equal to the voltage of the analog signal.

12. The image sensor of claim 11 wherein said control circuit latches a second portion of the digital code when said converter indicates that the second voltage is equal to the voltage of the analog signal.

13. An image sensor comprising:

an array of pixels organized into a plurality of rows and columns,

at least one double ramp analog-to-digital converter, said converter inputting an analog signal from at least one of said pixels and converting said analog signal into a digital code, and

a control circuit for controlling an operation of said double ramp analog-to-digital converter, said control circuit causing said analog-to-digital converter to convert the analog signal using a two step conversion process, wherein said control circuit comprises;

a counter for generating a digital count;

a digital-to-analog converter connected to receive the digital count from said counter, said digital-to-analog converter outputting an analog ramp voltage based on the digital count; and

control logic coupled to said counter and said double ramp analog-to-digital converter,

wherein during a first step of the conversion process, said control logic causes said counter to generate a gradually decreasing digital count such that the digital-to-analog converter generates a gradually decreasing ramp voltage until said analog-to-digital converter indicates that the gradually decreasing ramp voltage is less than a voltage of the analog signal.

14. The image sensor of claim 13, wherein during a second step of the conversion process, said control logic causes said counter to generate a gradually increasing digital count such that the digital-to-analog converter generates a gradually increasing ramp voltage until said analog-to-digital converter indicates that the gradually increasing ramp voltage is equal to the voltage of the analog signal.

15. An image sensor comprising:

an array of pixels organized into a plurality of rows and columns; and

at least one double ramp analog-to-digital converter, said converter inputting an analog signal from at least one of said pixels and converting said analog signal into a digital code, wherein said double ramp analog-to-digital converter comprises;

a comparator having a first input connected to receive the analog signal;

a first voltage storage means coupled between a second ramp voltage terminal and a second input of said comparator; and

a switch coupled between a first ramp voltage terminal and the second input of said comparator,

wherein when said switch is in a first position, said comparator compares the signal to a first ramp voltage input on said first ramp voltage terminal, and when said switch is in a second position said comparator compares the signal to a second ramp voltage input on said second ramp voltage terminal plus a stored voltage in said storage means.

16. The image sensor of claim 15, wherein the first ramp voltage is a coarse voltage and the second ramp voltage is a fine ramp voltage.

17. The image sensor of claim 15, wherein said double ramp analog-to-digital converter further comprises:

a second switch coupled between said second ramp voltage terminal and a potential; and

a third switch coupled between said first and second ramp voltage terminals, wherein said first ramp voltage terminal is connected to an input ramp voltage and when said second switch is closed and said third switch is open, the input ramp voltage is used to generate the first ramp voltage.

18. The image sensor of claim 17, wherein when said second switch is opened and said third switch is closed, the input ramp voltage is used to generate the second ramp voltage.

19. An image sensor comprising:

an array of pixels organized into a plurality of rows and columns; and

at least one double ramp analog-to-digital converter having an n-bit resolution, said converter inputting an analog voltage signal from at least one of said pixels and converting said analog signal into a digital code using a two step conversion process,

wherein a first step of said conversion process generates a first portion of said digital code and a second step of said conversion process generates a second portion of said digital code.

20. The image sensor of claim 19, wherein said double ramp analog-to-digital converter inputs and uses a first voltage to generate the first portion of said digital code and inputs and uses a second voltage to generate the second portion of said digital code.

21. The image sensor of claim 20, further comprising a control circuit connected to said analog-to-digital converter, said control circuit generating said first and second voltages and storing said digital code.

22. The image sensor of claim 20, further comprising a control circuit connected to said analog-to-digital converter, wherein said control circuit generates said first voltage by gradually decreasing a maximum voltage by a predetermined coarse value based on the resolution of the converter.

23. The image sensor of claim 22 wherein the coarse value corresponds to a most-significant bit of the digital code.

24. The image sensor of claim 22 wherein the fine value corresponds to a least-significant bit of the digital code.

25. The image sensor of claim 20, further comprising a control circuit connected to said analog-to-digital converter, wherein said control circuit generates said second voltage by gradually increasing a minimum voltage by a predetermined fine value based on the resolution of the converter.

26. The image sensor of claim 19 wherein said conversion process is completed in no more than 2^(n/2+1) comparison steps.

27. The image sensor of claim 19 further comprising a plurality of double ramp analog to digital converters, each of said converters being connected to a respective column of said array.

28. The image sensor of claim 19 further comprising a plurality of double ramp analog to digital converters, each of said converters being connected to a respective pixel of said array.

29. A double ramp analog-to-digital converter for use in an image sensor, said converter having an n-bit resolution and comprising:

a comparator having a first input connected to receive an analog voltage from at least one pixel of a pixel array, a second input connected to receive one of two ramp voltages, wherein said comparator compares the analog voltage to a first ramp voltage during a first conversion step to detect a first conversion voltage and compares the analog voltage to a second ramp voltage plus a stored voltage representing said first conversion voltage during a second conversion step.

30. The double ramp analog-to-digital converter of claim 29 wherein said conversion process is completed in no more than 2^(n/2+1) comparison steps.

31. The double ramp analog-to-digital converter of claim 29, Wherein the first ramp voltage is a coarse voltage and the second ramp voltage is a fine ramp voltage.

32. The double ramp analog-to-digital converter of claim 31, wherein the fine ramp voltage corresponds to the least-significant bits of the n-bit resolution.

33. The double ramp analog-to-digital converter of claim 31, wherein the coarse ramp voltage corresponds to the most-significant bits of the n-bit resolution.

34. The double ramp analog-to-digital converter of claim 29, further comprising:

a first ramp voltage terminal for receiving the first ramp voltage;

a second ramp voltage terminal for receiving the second ramp voltage;

a first voltage storage means coupled between the second ramp voltage terminal and the second input of said comparator; and

a switch coupled between the first ramp voltage terminal and the second input of said comparator, wherein when said switch is in a first position, said comparator compares the analog voltage to the first ramp voltage and when said switch is in a second position said comparator compares the analog voltage to the second ramp voltage plus a stored voltage in said storage means.

35. The double ramp analog-to-digital converter of claim 34 further comprising:

a second switch coupled between said second ramp voltage terminal and a potential; and

a third switch coupled between said first and second ramp voltage terminals, wherein said first ramp voltage terminal is connected to an input ramp voltage and when said second switch is closed and said third switch is open, the input ramp voltage is used to generate the first ramp voltage.

36. The double ramp analog-to-digital converter of claim 35, wherein when said second switch is opened and said third switch is closed, the input ramp voltage is used to generate the second ramp voltage.

37. A processor system comprising:

a processor; and

an image sensor connected to said processor, said image sensor comprising;

an array of pixels organized into a plurality of rows and columns; and

at least one double ramp analog-to-digital converter, said converter inputting an analog signal from at least one of said pixels and converting said analog signal into a digital code.

38. A processor system comprising:

a processor; and

an image sensor connected to said processor, said image sensor comprising;

an array of pixels organized into a plurality of rows and columns; and

at least one double ramp analog-to-digital converter having an n-bit resolution, said converter inputting an analog voltage signal from at least one of said pixels and converting said analog signal into a digital code using a two step conversion process,

wherein a first step of said conversion process generates a first portion of said digital code and a second step of said conversion process generates a second portion of said digital code.

39. A method of converting an analog pixel voltage into a digital code for use in an image sensor, said method comprising the steps of:

inputting the analog pixel voltage;

comparing the analog pixel voltage to a first ramp voltage to obtain a first part of the digital code; and

comparing the analog pixel voltage to a second ramp voltage to obtain a second part of the digital code.

40. The method of claim 39, further comprising the steps of:

generating a first voltage for the first ramp voltage;

determining if the first voltage is less than the analog pixel voltage; and

if it is determined that the first voltage is not less than the analog pixel voltage, decrementing the first voltage by a predetermined coarse value.

41. The method of claim 40 further comprising the step of repeating said determining step and said decrementing step until it is determined that the first voltage is less than the analog pixel voltage.

42. The method of claim 40, wherein the predetermined coarse value corresponds to a value of a most-significant bits of the digital code.

43. The method of claim 40, further comprising the steps of:

generating a second voltage for the second ramp voltage;

adding the second voltage to the first voltage;

determining if the added voltage is equal to the analog pixel voltage; and

if it is determined that the added voltage is not equal to the analog pixel voltage, incrementing the second voltage by a predetermined fine value.

44. The method of claim 43, wherein the predetermined fine value corresponds to a value of a least-significant bits of the digital code.

45. The method of claim 43 further comprising the step of repeating said adding, determining and incrementing steps until it is determined that the added voltage is equal to the analog pixel voltage.

46. The method of claim 39, further comprising the steps of:

generating a first voltage for the first ramp voltage;

determining if the first voltage is greater than the analog pixel voltage; and

if it is determined that the first voltage is not greater than the analog pixel voltage, incrementing the first voltage by a predetermined coarse value.

47. The method of claim 46 further comprising the step of repeating said determining step and said incrementing step until it is determined that the first voltage is greater than the analog pixel voltage.

48. The method of claim 46, wherein the predetermined coarse value corresponds to a value of a most-significant bits of the digital code.

49. The method of claim 46, further comprising the steps of:

generating a second voltage for the second ramp voltage;

adding the second voltage to the first voltage;

determining if the added voltage is equal to the analog pixel voltage; and

if it is determined that the added voltage is not equal to the analog pixel voltage, decrementing the second voltage by a predetermined fine value.

50. The method of claim 49, wherein the predetermined fine value corresponds to a value of a least-significant bits of the digital code.

51. The method of claim 49 further comprising the step of repeating said adding, determining and decrementing steps until it is determined that the added voltage is equal to the analog pixel voltage.