Electrostatic protection circuit and semiconductor integrated circuit using the same

• US 6,671,146 B1
• Filed: 12/19/2000
• Issued: 12/30/2003
• Est. Priority Date: 01/19/1999
• Status: Expired due to Fees

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Hashimoto, Masami, Okawa, Kazuhiko
• Primary Examiner(s): Toatley, Jr., Gregory J.
• Assistant Examiner(s): Demakis, James A
• Application Number:
  US09/646,332
• Time in Patent Office: 1,106 Days
• Field of Search: 361/56, 361/111, 361/117, 361/118
• US Class Current: 361/56
• CPC Class Codes: H01L 27/0255 using diodes as protective elements

Abstract

An electrostatic protection circuit of the present invention comprises: a first power supply terminal 1 to which a first voltage is applied; a second power supply terminal 2 to which a second voltage lower than the first voltage is applied; a first diode 12 connected in a reverse direction between the first and second power supply terminals; and a second diode 11 connected in a forward direction between the first and second power supply terminals. This configuration ensures that either one of the first and second diodes always operates in a forward direction to the static electricity applied between the first and second power supply terminals regardless of the polarity of the static electricity. Electrostatic charges therefore can be quickly absorbed through the diode in a forward direction.

Claims

1. An electrostatic protection circuit comprising:

a first power supply terminal to which a first voltage is applied;

a second power supply terminal to which a second voltage lower than the first voltage is applied;

a first diode connected in a reverse direction between the first and second power supply terminals; and

a second diode connected in a forward direction between the first and second power supply terminals,

wherein a forward drop voltage of the second diode is set to be higher than a drive voltage supplied between the first and second power supply terminals;

the second diode has a pn junction structure formed by a p-type diffusion layer and an n-type diffusion layer joined together;

the forward drop voltage is defined by a contact potential of the p-type diffusion layer and the n-type diffusion layer; and

the first and second diodes are formed on a silicon-on-insulator (SOI) substrate.

2. An electrostatic protection circuit comprising:

a first power supply terminal to which a first voltage is applied;

a second power supply terminal to which a second voltage lower than the first voltage is applied;

a first diode connected in a reverse direction between the first and second power supply terminals; and

a second diode connected in a forward direction between the first and second power supply terminals,

wherein a forward drop voltage of the second diode is set to be higher than a drive voltage supplied between the first and second power supply terminals;

the second diode is formed by a plurality of diodes connected in series;

each of the plurality of diodes has a pn junction structure formed by a p-type diffusion layer and an n-type diffusion layer joined together; and

the first and second diodes are formed on a silicon-on-insulator (SOI substrate.

3. An electrostatic protection circuit comprising:

a first power supply terminal to which a first voltage is applied;

a second power supply terminal to which a second voltage lower than the first voltage is applied;

a first diode connected in a reverse direction between the first and second power supply terminals; and

a second diode connected in a forward direction between the first and second power supply terminals,

wherein a forward drop voltage of the second diode is set to be higher than a drive voltage supplied between the first and second power supply terminals;

the second diode includes first p-type and n-type diffusion layers and a second p-type or n-type diffusion layer disposed between and connected to the first p-type and n-type diffusion layers;

the diffusion concentration of the first p-type and n-type diffusion layers is set to be higher than the diffusion concentration of the second p-type or n-type diffusion layer; and

the first and second diodes are formed on a silicon-on-insulator (SOI) substrate.

4. An electrostatic protection circuit comprising:

a first power supply terminal to which a first voltage is applied;

a second power supply terminal to which a second voltage lower than the first voltage is applied;

a signal terminal to which a signal voltage equal to or lower than the first voltage and equal to or higher than the second voltage is applied;

a first diode connected in a forward direction between the first power supply terminal and the signal terminal;

a second diode connected in a forward direction between the signal terminal and the second power supply terminal;

a third diode connected in a reverse direction between the first power supply terminal and the signal terminal; and

a fourth diode connected in a reverse direction between the signal terminal and the second power supply terminal,

wherein a forward drop voltage of each of the first and second diodes is set to be higher than a drive voltage supplied between the first and second power supply terminals, and

a high-frequency signal is input to the signal terminal.

5. The electrostatic protection circuit as defined in claim 4,

wherein each of the first and second diodes has a pn junction structure formed by a p-type diffusion layer and an n-type diffusion layer joined together; and

wherein the forward drop voltage is defined by a contact potential of the p-type diffusion layer and the n-type diffusion layer.

6. The electrostatic protection circuit as defined in claim 4,

wherein each of the first and second diodes is formed by a plurality of diodes connected in series;

and

wherein each of the plurality of diodes has a pn junction structure formed by a p-type diffusion layer and an n-type diffusion layer joined together.

7. The electrostatic protection circuit as defined in claim 4,

wherein the second diode includes first p-type and n-type diffusion layers, and a second p-type or n-type diffusion layer disposed between and connected to the first p-type and n-type diffusion layers;

and

wherein the diffusion concentration of the first p-type and n-type diffusion layers is set to be higher than the diffusion concentration of the second p-type or n-type diffusion layer.

8. The electrostatic protection circuit as defined in claim 4,

wherein each of the first and second diodes is formed by a MOS transistor having a drain electrode and a gate electrode which are connected to each other;

and

wherein the forward drop voltage is defined by the threshold voltage of the MOS transistor.

9. The electrostatic protection circuit as defined in claim 4,

wherein each of the first and second diodes is formed by connecting a plurality of MOS transistors in series;

and

wherein a drain electrode and a gate electrode are connected to each other in each of the plurality of MOS transistors.

10. The electrostatic protection circuit as defined in claim 4,

wherein each of the third and fourth diodes is formed by connecting in parallel a p-type MOS transistor having a source electrode and a gate electrode connected to the first power supply terminal, with an n-type MOS transistor having a source electrode and a gate electrode connected to the second power supply terminal.

11. The electrostatic protection circuit as defined in claim 4,

wherein the first to fourth diodes are formed on a silicon-on-insulator (SOI) substrate.