Semiconductor device having driver circuit and pixel section provided over same substrate

• US 6,674,136 B1
• Filed: 02/29/2000
• Issued: 01/06/2004
• Est. Priority Date: 03/04/1999
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Ohtani, Hisashi
• Primary Examiner(s): Lee, Eddie
• Assistant Examiner(s): Lee, Eugene
• Application Number:
  US09/515,821
• Time in Patent Office: 1,407 Days
• Field of Search: 257/79, 257/82, 257/66, 257/336, 257/344, 257/408
• US Class Current: 257/408
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/127 with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/66772 Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates H01L29/66666 takes precedence; thin film FinFETs H01L29/66795
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78627 with a significant overlap between the lightly doped drain and the gate electrode, e.g. GOLDD
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H01L 29/78654 Monocrystalline silicon transistors
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H10K 50/865 comprising light absorbing layers, e.g. light-blocking layers
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays

Abstract

In a manufacturing method of an active matrix type liquid crystal display device, a semiconductor device having good TFT characteristics is realized. LDD regions of a driver circuit NTFT and LDD regions of a pixel section NTFT are given different impurity concentration. An impurity is doped at differing concentrations using a mask. Thus a liquid crystal display device provided with a driver circuit having high speed operation and a pixel section with high reliability can be obtained.

Claims

1. A semiconductor device comprising:

a driver circuit and a pixel section formed over the same substrate;

an n-channel TFT provided in said driver circuit over said substrate comprising a pair of high concentration impurity regions, a channel forming region provided between said high concentration impurity region, and a low concentration impurity region provided between said channel forming region and at least one of said high concentration impurity regions, said high concentration impurity region containing a Group 15 element in the Periodic Table therein; and

an n-channel TFT provided in said pixel section over said substrate and comprising a pair of high concentration impurity regions, a channel forming region provided between said high concentration impurity region, and a low concentration impurity region provided between said channel forming region and at least one of said high concentration impurity regions, said high concentration impurity region of said n-channel TFT in said pixel section containing a Group 15 element in the Periodic Table therein,

wherein concentration of said Group 15 element contained in said high concentration impurity region of said TFT in said driver circuit is higher in comparison with concentration of said Group 15 element contained in said high concentration impurity region of said TFT in said pixel section.

3. A device according to claim 1, wherein the width of said low concentration impurity regions of said n-channel TFT in said driver circuit in channel length direction thereof differs from the width of said low concentration impurity regions of said n-channel TFT in said pixel section in channel length direction thereof.

5. A device according to claim 1, wherein for said n-channel TFT in said pixel section, a shielding layer is provided over said substrate, an insulating film is provided in contact with said shielding layer, said channel forming region of said n-channel TFT in said pixel section is provided in contact with said insulating film, a gate insulating film is provided in contact with said channel forming region, and a gate electrode provided in contact with the gate insulating film.

7. A device according to claim 5, wherein said shielding layer overlaps with said channel forming region and said low concentration impurity region of said n-channel TFT in said pixel section through said insulating film.

9. A device according to claim 5, wherein width of said shielding layer in channel length direction of said n-channel TFT in said pixel section is wider than width of said gate electrode of said n-channel TFT in said pixel section in said channel length direction.

11. A device according to claim 1 wherein said semiconductor device is selected from the group consisting of a video camera, a digital camera, a projector, a head mount display, a navigation system a personal computer, a portable information terminal, a mobile computer, a cellular phone, and an electronic book.

2. A semiconductor device comprising:

a driver circuit and a pixel section formed over the same substrate;

an n-channel TFT provided in said driver circuit over said substrate comprising a channel forming region, a gate insulating film provided in contact with said channel forming region, and a gate electrode provided in contact with said gate insulating film, a pair of low concentration impurity regions sandwiching said channel forming region, and a high concentration impurity region provided in contact with corresponding one of said low concentration impurity regions, said high concentration impurity region containing a Group 15 element in the Periodic Table therein; and

an n-channel TFT provided in said pixel section over said substrate and comprising a channel forming region, a gate insulating film provided in contact with said channel forming region, and a gate electrode provided in contact with said gate insulating film, a pair of low concentration impurity regions sandwiching said channel forming region, and a high concentration impurity region provided in contact with corresponding one of said low concentration impurity regions, said high concentration impurity region of said n-channel TFT in said pixel section containing a Group 15 element in the Periodic Table therein,

wherein at least one of said low concentration impurity regions of said n-channel TFT in said driver circuit overlaps with said gate electrode of said n-channel TFT of said driver circuit through said gate insulating film of said n-channel TFT of said driver circuit, and

wherein concentration of said Group 15 element contained in said high concentration impurity region of said TFT in said driver circuit is higher in comparison with concentration of said Group 15 element contained in said high concentration impurity region of said TFT in said pixel section.

4. A device according to claim 2, wherein the width of said low concentration impurity regions of said n-channel TFT in said driver circuit in channel length direction thereof differs from the width of said low concentration impurity regions of said n-channel TFT in said pixel section in channel length direction thereof.

6. A device according to claim 2, wherein for said n-channel TFT in said pixel section, a shielding layer is provided over said substrate, an insulating film is provided in contact with said shielding layer, said channel forming region of said n-channel TFT in said pixel section is provided in contact with said insulating film.

8. A device according to claim 6, wherein said shielding layer overlaps with said channel forming region and said low concentration impurity regions of said n-channel TFT in said pixel section through said insulating film.

10. A device according to claim 6, wherein width of said shielding layer in channel length direction of said n-channel TFT in said pixel section is wider than width of said gate electrode of said n-channel TFT in said pixel section in said channel length direction.

12. A device according to claim 2 wherein said semiconductor device is selected from the group consisting of a video camera, a digital camera, a projector, a head mount display, a navigation system, a personal computer, a portable information terminal, a mobile computer, a cellular phone, and an electronic book.