Low dielectric constant STI with SOI devices

• US 6,677,209 B2
• Filed: 03/13/2002
• Issued: 01/13/2004
• Est. Priority Date: 02/14/2000
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Farrar, Paul A.
• Primary Examiner(s): Elms, Richard
• Assistant Examiner(s): Owens, Beth E.
• Application Number:
  US10/099,169
• Publication Number:
  US 20020094651A1
• Time in Patent Office: 671 Days
• Field of Search: 438/296, 438/411, 438/412, 438/421, 438/294
• US Class Current: 438/296
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264

Abstract

Techniques of shallow trench isolation and devices produced therefrom are shown. The techniques of shallow trench isolation utilize foamed polymers, cured aerogels or air gaps as the insulation medium. Such techniques facilitate lower dielectric constants than the standard silicon dioxide due to the cells of gaseous components inherent in foamed polymers, cured aerogels or air gaps. Lower dielectric constants reduce capacitive coupling concerns and thus permit higher device density in an integrated circuit device. The shallow trench isolation structures are used on a variety of substrates including silicon-on-insulator (SOI) substrates and silicon-on-nothing (SON) substrates.

Claims

1. A method of isolating a first active region from a second active region in an integrated circuit device, comprising:

forming a substrate, including;

forming a dielectric layer;

forming a semiconductor layer coupled to the dielectric layer;

forming a trench in the substrate, wherein the first active region is on a first side of the trench and the second active region is on a second side of the trench;

filling the trench with a polymeric material; and

foaming the polymeric material.

2. The method of claim 1, wherein forming the dielectric layer includes forming a silicon dioxide (SiO2) layer.

3. The method of claim 1, wherein forming the dielectric layer includes forming an air gap.

4. The method of claim 1, wherein forming the trench in the substrate includes forming a trench to a depth of the dielectric layer.

5. The method of claim 1, wherein forming the trench in the substrate includes forming a trench to a depth below a top of the dielectric layer.

6. The method of claim 1, wherein filling the trench with a polymeric material includes filling the trench with a polymeric material selected from the group consisting of methylsilsesquioxane, polyimides and polynorbornenes.

7. The method of claim 1, wherein filling the trench with a polymeric material includes filling the trench with a polymeric material selected from the group consisting of Type I and Type III polyimides.

8. The method of claim 1, wherein foaming the polymeric material further comprises:

exposing the polymeric material to a supercritical fluid, thereby forming a saturated polymeric material; and

depressurizing the saturated polymeric material, thereby forming cells.

9. The method of claim 8, wherein exposing the polymeric material to the supercritical fluid includes exposing the polymeric material to supercritical carbon dioxide.

10. The method of claim 1, wherein the method is performed in the order presented.

11. A method of isolating a first active region from a second active region in an integrated circuit device, comprising:

forming a substrate, including;

forming a dielectric layer;

forming a semiconductor layer coupled to the dielectric layer;

forming a trench in the substrate, wherein the first active region is on a first side of the trench and the second active region is on a second side of the trench;

filling the trench with an aerogel material; and

curing the aerogel material.

12. The method of claim 11, wherein forming the dielectric layer includes forming a silicon dioxide (SiO2) layer.

13. The method of claim 11, wherein forming the dielectric layer includes forming an air gap.

14. The method of claim 11, wherein the method is performed in the order presented.

15. A method of isolating a first active region from a second active region in an integrated circuit device, comprising:

forming a substrate, including;

forming a dielectric layer, wherein forming the dielectric layer includes forming an air gap;

forming a semiconductor layer coupled to the dielectric layer;

forming a trench in the substrate, wherein the first active region is on a first side of the trench and the second active region is on a second side of the trench;

filling the trench with a polymeric material;

defining additional structures in the integrated circuit device; and

removing the polymeric material.

16. The method of claim 15, wherein forming the dielectric layer includes forming a silicon dioxide (SiO2) layer.

17. The method of claim 15, wherein removing the polymeric material includes decomposing the polymeric material.

18. The method of claim 15, wherein removing the polymeric material includes exposing the polymeric material to an oxygen plasma.

19. The method of claim 15, wherein removing the polymeric material includes exposing the polymeric material to an ozone plasma.

20. The method of claim 15, wherein the method is performed in the order presented.

21. A method of isolating a first active region from a second active region in an integrated circuit device, comprising:

forming a substrate, including;

forming a dielectric layer, wherein forming the dielectric layer includes forming an air gap;

forming a semiconductor layer coupled to the dielectric layer;

forming a trench in the substrate, wherein the first active region is on a first side of the trench and the second active region is on a second side of the trench;

filling the trench with a first fill material;

defining additional structures in the integrated circuit device;

removing the first fill material; and

filling the trench with a second fill material.

22. The method of claim 21, wherein forming the dielectric layer includes forming a silicon dioxide (SiO2) layer.

23. The method of claim 21, wherein filling the trench with the first fill material includes filling the trench with a polymeric material.

24. The method of claim 23, wherein filling the trench with the polymeric material includes filling the trench with a polymeric material selected from the group consisting of methylsilsesquioxane materials, polyimide materials and polynorbornene materials.

25. The method of claim 21, wherein filling the trench with the second fill material includes filling the trench with a foamed polymeric material.

26. The method of claim 25, wherein filling the trench with the foamed polymeric material includes filling the trench with a cured aerogel.

27. The method of claim 21, wherein filling the trench with the second fill material includes filling the trench with an air gap.

28. The method of claim 21, wherein the method is performed in the order presented.

29. A method of isolating a first active region from a second active region in an integrated circuit device, comprising:

forming a substrate, including;

forming a dielectric layer;

forming a semiconductor layer coupled to the dielectric layer;

forming a trench in the substrate, wherein the first active region is on a first side of the trench and the second active region is on a second side of the trench;

filling the trench with a first polymeric material;

defining additional structures in the integrated circuit device;

removing the first polymeric material;

filling the trench with a second polymeric material; and

foaming the second polymeric material.

30. The method of claim 29, wherein forming the dielectric layer includes forming a silicon dioxide (SiO2) layer.

31. The method of claim 29, wherein forming the dielectric layer includes forming an air gap.

32. The method of claim 29, wherein the method is performed in the order presented.

33. A method of isolating a first active region from a second active region in an integrated circuit device, comprising:

forming a substrate, including;

forming a dielectric layer;

forming a semiconductor layer coupled to the dielectric layer;

forming a trench in the substrate, wherein the first active region is on a first side of the trench and the second active region is on a second side of the trench;

filling the trench with a polymeric material;

defining additional structures in the integrated circuit device;

removing the polymeric material;

filling the trench with an aerogel material; and

curing the aerogel material.

34. The method of claim 33, wherein forming the dielectric layer includes forming a silicon dioxide (SiO2) layer.

35. The method of claim 33, wherein forming the dielectric layer includes forming an air gap.

36. The method of claim 33, wherein the method is performed in the order presented.