Method of increasing the etch selectivity of a contact sidewall to a preclean etchant

• US 6,677,247 B2
• Filed: 01/07/2002
• Issued: 01/13/2004
• Est. Priority Date: 01/07/2002
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Yuan, Zheng, Ghanayem, Steve, Thakur, Randhir P. S.
• Primary Examiner(s): Powell, William A.
• Application Number:
  US10/041,550
• Publication Number:
  US 20030127427A1
• Time in Patent Office: 736 Days
• Field of Search: 438/692, 438/723, 438/724, 438/743, 438/744, 438/745, 438/756, 438/757, 216/2, 216/38, 216/39, 216/67, 216/79, 216/88, 216/99, 134/1.2, 134/1.3
• US Class Current: 438/723
• CPC Class Codes: C03C 15/00 Surface treatment of glass, not in the form of fibres or filaments, by etching etching or surface-brightening compositions, in general C09K13/00
• CPC Class Codes: H01L 21/02043 Cleaning before device manufacture, i.e. Begin-Of-Line process
• CPC Class Codes: H01L 21/02046 Dry cleaning only H01L21/02085 takes precedence
• CPC Class Codes: H01L 21/02063 the processing being the formation of vias or contact holes
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76826 by contacting the layer with gases, liquids or plasmas
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners

Abstract

A method of forming a contact in an integrated circuit between a first metalization layer and a silicon substrate. In one embodiment the method comprises forming a premetal dielectric layer over the silicon substrate, etching a contact hole through the premetal dielectric layer and then forming a thin silicon nitride layer on an outer surface of the contact hole. The silicon nitride layer reduces overetching that may otherwise occur when oxidation build-up is removed from the silicon interface within the contact hole by a preclean process. After the preclean process, the contact hole is then filled with one or more conductive materials. In various embodiments the silicon nitride layer is formed by exposing the contact hole to a nitrogen plasma, depositing the layer by a chemical vapor deposition process and depositing the layer by an atomic layer deposition process. In other embodiments, the method is applicable to the formation of vias through intermetal dielectric layers.

Claims

1. A method of forming a contact in an integrated circuit between a first metalization layer and a silicon substrate, said method comprising:

forming a premetal dielectric layer over said silicon substrate;

etching a contact hole through said premetal dielectric layer, said contact hole having an inner surface that extends from a top of said contact hole to a bottom;

forming a nitrogen including layer on said inner surface;

removing residue and/or oxidation build-up within said contact hole at the silicon interface; and

filling said contact hole with one or more conductive materials.

2. The method of claim 1 wherein said nitrogen including layer is formed by exposing said contact hole to a nitrogen-containing plasma.

3. The method of claim 1 wherein said nitrogen including layer is formed by depositing a layer of silicon nitride over said inner surface.

4. The method of claim 3 wherein said layer of silicon nitride is deposited by an atomic layer deposition process.

5. The method of claim 3 wherein said layer of silicon nitride is deposited by a chemical vapor deposition process.

6. The method of claim 1 wherein said premetal dielectric layer is a silicate glass layer doped with boron and phosphorus.

7. The method of claim 1 wherein said removing step comprises exposing said contact hole to a wet etchant.

8. The method of claim 1 wherein said removing step comprises exposing said contact hole to a plasma formed from an etchant gas.

9. A method of processing a substrate having a contact hole etched through a premetal dielectric layer to an upper surface of said substrate, said method comprising:

forming a nitrogen including layer on an inner surface of said contact hole; and

thereafter, exposing said contact hole to an etchant to remove residue and/or oxidation build-up at said upper surface of said substrate within said contact hole;

wherein said etchant has a higher etch selectivity to said nitrogen including layer than to said residue and/or oxidation build-up.

10. The method of claim 9 wherein said nitrogen including layer is formed by exposing said contact hole to a nitrogen-containing plasma.

11. The method of claim 10 wherein said contact hole is exposed to said nitrogen-containing plasma for between 20 seconds and 5 minutes.

12. The method of claim 10 wherein said contact hole is exposed to said nitrogen-containing plasma for between 30 seconds and 2 minutes.

13. The method of claim 9 wherein said nitrogen including layer is formed by depositing a layer of silicon nitride over said inner surface.

14. The method of claim 13 wherein said layer of silicon nitride is deposited by an atomic layer deposition process.

15. The method of claim 13 wherein said layer of silicon nitride is deposited by a chemical vapor deposition process.

16. The method of claim 9 wherein said premetal layer is a BPSG or PSG layer.

17. A method of increasing the etch selectivity to a contact preclean etchant of a portion of a dielectric layer having a contact or via hole etched through said layer, said method comprising nitriding an inner sidewall surface of said contact hole by exposing said hole to a nitrogen-containing plasma prior to exposing said hole to said preclean etchant.

18. The method of claim 17 wherein said preclean etchant is generated from a plasma formed from H₂, NH₃, or a halogen-containing gas.

19. The method of claim 17 wherein said dielectric layer is a premetal dielectric layer and said hole is a contact hole etched through said layer to an upper surface of a silicon substrate.

20. A method of forming a contact in an integrated circuit between a first metalization layer and a silicon substrate, said method comprising:

forming a premetal dielectric layer over said silicon substrate;

etching a contact hole through said premetal dielectric layer, said contact hole having an inner surface that extends from a top of said contact hole to a bottom;

nitiding said inner surface of said contact hole by exposing said contact hole to a nitrogen-containing plasma;

thereafter, exposing said contact hole to an etchant to remove residue and/or oxidation build-up within said contact hole; and

filling said contact hole with one or more conductive materials.

21. The method of claim 20 wherein said contact hole is exposed to said nitrogen-containing plasma for between 20 seconds and 5 minutes.

22. The method of claim 20 wherein said contact hole is exposed to said nitrogen-containing plasma for between 30 seconds and 2 minutes.

23. The method of claim 21 wherein said nitrogen-containing plasma consists of molecular nitrogen.

24. The method of claim 21 wherein said premetal dielectric layer is a silicate glass layer doped with boron and phosphorus.