Thin film transistor, manufacturing method thereof, and circuit and liquid crystal display device using the thin film transistor

• US 6,677,609 B2
• Filed: 08/24/2001
• Issued: 01/13/2004
• Est. Priority Date: 06/28/1996
• Status: Expired due to Term

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Inoue, Satoshi
• Primary Examiner(s): Ngô , Ngân V.
• Application Number:
  US09/935,641
• Publication Number:
  US 20020005517A1
• Time in Patent Office: 872 Days
• Field of Search: 257/59, 257/72, 257/350
• US Class Current: 257/59
• CPC Class Codes: C23C 14/3471 Introduction of auxiliary energy into the plasma
• CPC Class Codes: C23C 16/517 using a combination of discharges covered by two or more of groups C23C16/503 - C23C16/515
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: H01J 37/3408 Planar magnetron sputtering
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76846 Layer combinations
• CPC Class Codes: H01L 21/76856 by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A thin film transistor has a structure capable of decreasing deterioration in Vgs-Ids characteristics. The thin film transistor has a source region composed of an N-type impurity-diffused region, a drain region, and a gate electrode, and a channel region formed directly below the gate electrode. To the source region and the drain region are connected a source electrode and a drain electrode, respectively, through a plurality of contact holes. In the channel region are formed a plurality of P-type impurity-diffused regions at constant intervals.

Claims

1. A thin film transistor, comprising:

a channel region formed in a non-single crystal silicon thin film;

first and second regions of a first conduction type formed in the non-single crystal silicon thin film to be separated with the channel region therebetween;

a carrier injection region into which carriers of the conduction type opposite to the first conduction type generated in a high electric field region near the first or second region flow; and

a first and a second electrodes being in contact with the first and second regions, respectively.

wherein the electrodes are separated from the carrier injection region.

16. An electro-optical device comprising:

the transistor according to claim 1, and further comprising;

a source line driver circuit, a gate line driver circuit, an analog switch circuit, and a pixel circuit,

the source line driver circuit, the gate line driver circuit, the analog switch circuit, and the pixel circuit being formed on a substrate and at least one of the source line driver circuit, the analog switch circuit, and the pixel circuit includes the transistor.

2. A thin film transistor, comprising:

a channel region formed in a non-single crystal silicon thin film;

first and second regions of a first conduction type formed in the non-single crystal silicon thin film to be separated with the channel region therebetween;

at least one third region of a conduction type opposite to the first conduction type formed between the first and second regions in the non-single crystal silicon thin film; and

a first and a second electrodes being in contact with the first and the second regions, respectively.

wherein the electrodes are separated from the third region.

3. The thin film transistor according to claim 2, further including a plurality of the third regions formed on the non-single crystal silicon thin film.

4. The thin film transistor according to claim 2, the third region being formed between at least one of the first region and second region, and the channel region in the non-single crystal silicon thin film.

5. The thin film transistor according to claim 2, the third region being formed in at least a portion of the channel region.

6. A circuit, comprising:

the thin film transistor according to claim 2.

7. A built-in driver circuit type liquid crystal display device, comprising:

a thin film transistor according to claim 2.

8. A liquid crystal display comprising:

If the circuit according to claim 6.

9. A liquid crystal display device according to claim 7, the thin film transistor being used as a transistor of an analogue switch circuit.

10. An electro-optical device comprising:

the thin film transistor according to claim 2.

11. An electro-optical device comprising:

the circuit according to claim 10.

12. An electro-optical device according to claim 11, the thin film transistor being used as a transistor of an analogue switch circuit.

13. An electronic apparatus comprising:

the circuit according to claim 6.

14. An electronic apparatus comprising:

the liquid crystal display device according to claim 7.

15. An electronic apparatus comprising:

the electro-optical device according to claim 10.