Driving circuit and method for light emitting device

• US 6,677,713 B1
• Filed: 10/25/2002
• Issued: 01/13/2004
• Est. Priority Date: 08/28/2002
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: AU Optronics Corporation
• Inventors: Sung, Chih-Feng
• Primary Examiner(s): Philogene, Haissa
• Application Number:
  US10/065,502
• Time in Patent Office: 445 Days
• Field of Search: 315/169.1, 315/169.2, 315/169.3, 315/204, 315/214, 315/82, 315/42, 315/55, 315/92, 315/99, 315/44, 315/46, 315/78, 315/48
• US Class Current: 315/169.1
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: H05B 45/00 Circuit arrangements for operating light-emitting diodes [LED]
• CPC Class Codes: H05B 45/60 Circuit arrangements for operating LEDs comprising organic material, e.g. for operating organic light-emitting diodes [OLED] or polymer light-emitting diodes [PLED]

Abstract

A driving circuit for a light-emitting device, having a driving, a first and a second transistor, and a maintaining capacitor. The light-emitting device is coupled to the driving transistor in series to form a light-emitting path. The on/off state of the driving transistor determines the conductance and on/off state of the light-emitting path. The first transistor has a source region coupled to the gate of the driving transistor and a gate coupled to a first scan line. The second transistor has a source region coupled to a reference low voltage, a drain region coupled to the gate of the driving transistor, and a gate coupled to a second scan line. The pulses of the first and second scan lines have the same frequency, while there is a delay time therebetween. The maintaining capacitor is coupled to the gate of the driving transistor to maintain a voltage state.

Claims

1. A driving circuit for a light-emitting device, suitable for using in an active matrix organic light-emitting diode, the driving circuit comprising:

a driving transistor, having a gate coupled to a node;

a light-emitting device, coupled to the driving transistor in series to form a light-emitting path, wherein the light-emitting path is connected between a system high voltage and a system low voltage, and when the driving transistor is activated, the light-emitting device is driven by the system high voltage to illuminate;

a maintaining capacitor, coupled to the node to maintain an on/off state of the driving transistor; and

a system driving path, including a first transistor and a second transistor connected to each other in series through the node, wherein the first transistor has a gate receiving a first scan clock pulse, and the second transistor has a gate receiving a second scan clock pulse, the first and second scan clock pulse have the same frequency, while the second scan clock pulse is delayed from the first scan clock pulse by a delay time;

wherein when the first transistor is activated by a plurality of pulses of the first scan clock pulse, a data voltage corresponding to one frame is input to the node for controlling activation of the driving transistor to perform image display; and

when the second transistor is activated by a plurality of pulses of the second clock pulse, a switch-off voltage is input to the node to switch off the driving transistor.

2. The driving circuit according to claim 1, wherein the light-emitting device includes an active matrix organic light-emitting device.

3. The driving circuit according to claim 1, wherein the delay time is T/n, wherein T is a period of the first scan clock pulse, and n is a positive integer larger than 1.

4. The driving circuit according to claim 1, wherein the driving transistor includes an N-type thin-film transistor or a P-type thin-film transistor.

5. The driving circuit according to claim 1, wherein the first and second transistors include N-type thin-film transistors or P-type thin-film transistors.

6. The driving circuit according to claim 1, wherein the switch-off voltage includes a positive voltage lower than the data voltage.

7. The driving circuit according to claim 1, wherein the switch-off voltage includes a negative voltage.

8. A driving circuit for a light-emitting device, comprising:

a driving transistor, including a gate;

a light-emitting device, coupled to the driving transistor in series to form a light-emitting path, wherein an on/off state of the driving transistor determines an on/off state of the light-emitting path;

a first transistor, having a source region coupled to a data line, a drain region coupled to the gate of the driving transistor, and a gate coupled to a first scan line;

a second transistor, having a source region coupled to a reference low voltage,

a drain region coupled to the gate of the driving transistor, and a gate coupled to a second scan line, wherein clock pulses of the first and second scan lines have the same frequency, and the second scan line delays from the first scan line by a delay time; and

a maintaining capacitor, coupled to the gate of the driving transistor to maintain a voltage state thereof.

9. The driving circuit according to claim 8, wherein the light-emitting device includes an active matrix organic light-emitting diode.

10. The driving circuit according to claim 8, wherein the delay time is T/n, wherein T is a period of the first scan clock pulse, and n is a positive integer larger than 1.

11. The driving circuit according to claim 8, wherein the driving transistor includes an N-type thin-film transistor or a P-type thin-film transistor.

12. The driving circuit according to claim 8, wherein the first and second transistors include N-type thin-film transistors or P-type thin-film transistors.

13. The driving circuit according to claim 8, wherein the reference low voltage includes a positive voltage able to switch off the driving transistor.

14. The driving circuit according to claim 8, wherein the reference low voltage includes a negative voltage able to switch off the driving transistor.

15. A driving method of a driving circuit for driving a light-emitting device which comprises a light-emitting unit and a control transistor, wherein the control transistor is controlled by a scan line and a data line to output a control signal to an input terminal of the light-emitting unit, the method comprising:

providing a reset device operative to output a voltage signal by a clock;

setting the clock of the reset device, such that a clock of the scan line and the clock of the reset device have the same frequency, while the clock of the reset device is delayed by a delay time; and

outputting the voltage signal to the input terminal of the light-emitting unit, according to the clock of the reset device, such that the light-emitting unit temporarily stops illuminating.

16. The method according to claim 15, wherein the voltage signal includes a discharge voltage.

17. The method according to claim 15, wherein the voltage signal temporarily switches off a driving transistor in the light-emitting unit for controlling a light-emitting device.

18. The method according to claim 15, wherein when the clock of the scan line activates the control transistor, an image data of the data line is input to the light-emitting unit for displaying an image of the image data.

19. The method according to claim 15, wherein the light-emitting unit is reset when the voltage signal is input to the light-emitting unit.