Circuit arrangement for gaining a direct voltage using full bridge rectifier and coupling capacitors

• US 6,678,179 B2
• Filed: 03/26/2002
• Issued: 01/13/2004
• Est. Priority Date: 03/31/2001
• Status: Expired due to Fees

• Current Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Buehring, Peter
• Primary Examiner(s): Berhane, Adolf D.
• Application Number:
  US10/107,010
• Publication Number:
  US 20030016547A1
• Time in Patent Office: 658 Days
• Field of Search: 363/125, 363/65, 363/67, 363/68, 363/69, 363/70, 363/126
• US Class Current: 363/125
• CPC Class Codes: H02M 3/28 using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
• CPC Class Codes: H02M 7/05 Capacitor coupled rectifiers
• CPC Class Codes: H02M 7/06 using discharge tubes without control electrode or semiconductor devices without control electrode

Abstract

In the circuit arrangement according to the invention, means (1) for generating an alternating voltage from the DC input voltage are provided for gaining an offset-compensated DC output voltage from a DC input voltage, without using transformers and inductances. The alternating voltage is applied to at least one rectifier stage (2) which comprises two coupling capacitors (8, 9) and a subsequent full-bridge rectifier (10, 11, 12, 13) at its input, and is coupled at its output to an output capacitance (3) via which the DC output voltage decreases.

Claims

1. A circuit arrangement for gaining an offset-compensated DC output voltage from a DC input voltage, wherein means (1) for generating an alternating voltage from the DC input voltage are provided, and wherein the alternating voltage is applied to at least one rectifier stage (2) which comprises two coupling capacitors (8, 9) and a subsequent full-bridge rectifier (10, 11, 12, 13) at its input, the two coupling capacitors being positioned between the generating means (1) and the subsequent full-bridge rectifier along paths from input terminals (P_I, M_I) to output terminals (P, M), and is coupled at its output to at least an output capacitance (3) via which the DC output voltage decreases.

2. A circuit arrangement as claimed in claim 1, characterized in that at least two rectifier stages (2, 22, 32) arranged parallel at the input side are provided, whose outputs are serially arranged one behind the other for the purpose of voltage multiplication, wherein at least one output capacitance (3) is arranged parallel to the series arrangement of the outputs of the rectifier stages (2, 22, 32).

3. A circuit arrangement as claimed in claim 1, characterized in that at least two rectifier stages (2, 22, 32) arranged parallel at the input side are provided, whose outputs are serially arranged one behind the other for the purpose of voltage multiplication, wherein a respective output capacitance is connected to the outputs of the rectifier stages (2, 22, 32), and the series arrangement of output capacitances supplies the DC output voltage.

4. A circuit arrangement as claimed in claim 1, characterized in that a respective alternating voltage terminal is connected to one of the coupling capacitors (8;

9) and in that the coupling capacitors (8;

9) are connected to the anode of a diode (10, 11) and to the cathode of a further diode (13;

12) of the full-bridge rectifier.

5. A circuit arrangement as claimed in claim 1, characterized in that an H bridge (4, 5, 6, 7) is provided as a means (1) for generating an alternating voltage.

6. Use of a circuit arrangement as claimed in claim 1, for generating a DC power supply voltage for a data bus.

7. Use of a circuit arrangement as claimed in claim 1, for generating a DC power supply voltage for a data bus in a vehicle.

8. Use of a circuit arrangement as claimed in claim 2, in a battery-operated apparatus, for generating a DC voltage which is higher as compared with the battery voltage.

9. Use of a circuit arrangement as claimed in claim 1, for generating a DC power supply voltage for data transmission devices and/or data receiving devices of a data bus system.

10. Use of a circuit arrangement as claimed in claim 1, for generating a DC power supply voltage for data transmission devices and/or data receiving devices of a data bus system in a vehicle.

11. A circuit arrangement for gaining an offset-compensated DC output voltage from a DC input voltage, comprising:

means (1) for generating an alternating voltage from the DC input voltage;

at least one rectifier stage (2) which comprises two coupling capacitors (8, 9) and a subsequent full-bridge rectifier (10, 11, 12, 13) at its input, and is coupled at its output to at least an output capacitance (3); and

wherein the subsequent full bridge rectifier comprises two diodes (10, 11) including anodes coupled to the two coupling capacitors (8, 9) and cathodes coupled to a first terminal of the output capacitance (3), and two other rectifiers (12, 13) including cathodes coupled to the two coupling capacitors (8, 9) and anodes coupled to a second terminal of the output capacitance (3).

12. A circuit arrangement for gaining an offset-compensated DC output voltage from a DC input voltage, comprising:

a transformerless means (1) for generating an alternating voltage from the DC input voltage; and

at least one rectifier stage (2) which comprises two coupling capacitors (8, 9) and a subsequent full-bridge rectifier (10, 11, 12, 13) at its input, and is coupled at its output to at least an output capacitance (3) via which the DC output voltage decreases.

13. The circuit arrangement as claimed in claim 12, wherein the transformerless means (1) include an H bridge design of four switches (4, 5, 6, 7).