Method for extending digital receiver sensitivity using analog correlation

• US 6,678,312 B1
• Filed: 12/22/1999
• Issued: 01/13/2004
• Est. Priority Date: 12/22/1999
• Status: Expired due to Term

• Current Assignee: STMicroelectronics International N.V. (STMicroelectronics NV)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Mohindra, Rishi
• Primary Examiner(s): PHU, PHUONG M
• Application Number:
  US09/469,322
• Time in Patent Office: 1,483 Days
• Field of Search: 375/147, 375/149, 375/150, 375/140-142, 375/145, 375/343, 375/340, 375/329, 455/343, 341/155
• US Class Current: 375/150
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 1/709 Correlator structure
• CPC Class Codes: H04W 52/0245 according to signal strength
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

Analog correlation techniques are used in a digital receiver portion of a spread spectrum transceiver to determine when to turn ON given digital receiver components. According to a particular embodiment, an analog correlator receives the down-converted in-phase and quadrature-phase outputs from the radio section and determines when a received signal is coming up at or near a given noise level. A control circuit is coupled to the correlator to selectively activate flash A/D converters in the digital receiver portion of the baseband processor. The analog correlator replaces the RSSI for “sniffing” whether a received signal is present.

Claims

1. In a spread spectrum transceiver comprising a radio circuit coupled to a baseband processor, the baseband processor including a spread spectrum despreader and flash A/D converters for sampling down-converted in-phase and quadrature-phase signals received from the radio circuit, the improvement comprising:

an analog correlator for detecting when a received signal is coming up at or near a given noise level; and

a control circuit coupled to the analog correlator for selectively activating the flash A/D converters,

wherein the analog correlator comprises a pseudorandom number (PN) sequence generator, an in-phase section, and a quadrature phase section.

2. In the spread spectrum transceiver as described in claim 1 wherein the in-phase section comprises:

an analog multiplier for receiving the down-converted in-phase signal from the radio circuit and a bit sequence generated by the PN sequence generator and, in response thereto, generating a first signal;

an integrator and dump circuit for integrating the first signal over a given time period to generate a second signal;

a sample and hold circuit for sampling the second signal and generating a third signal; and

an analog squaring circuit for squaring the third signal and generating a fourth signal.

3. In the spread spectrum transceiver as described in claim 1 wherein the quadrature phase section comprises:

an analog multiplier for receiving the down-converted quadrature-phase signal from the radio circuit and a bit sequence generated by the PN sequence generator and, in response thereto, generating a first signal;

an integrator and dump circuit for integrating the first signal over a given time period to generate a second signal;

a sample and hold circuit for sampling the second signal and generating a third signal; and

an analog squaring circuit for squaring the third signal and generating a fourth signal.

4. In the spread spectrum transceiver as described in claim 1 wherein the PN sequence generator generates a Barker sequence.

5. In the spread spectrum transceiver as described in claim 4 wherein the Barker sequence is an 11 bit Barker.

6. In the spread spectrum transceiver as described in claim 1, further including:

a tracking loop for maintaining a PN sequence output from the PN sequence generator in alignment with a PN sequence in the down-converted in-phase and quadrature-phase signals received from the radio circuit.

7. A transceiver, comprising:

a radio circuit;

a baseband processor coupled to the radio circuit and including a demodulator and A/D converters for sampling down-converted in-phase and quadrature-phase signals received from the radio circuit;

a PN sequence generator;

an analog correlator for detecting when a received signal is coming up at or near a given noise level;

a tracking loop for maintaining a PN sequence output from the PN sequence generator in alignment with a PN sequence in the down-converted in-phase and quadrature-phase signals received from the radio circuit following detection of the received signal; and

a control circuit coupled to the analog correlator for selectively switching the flash A/D converters from an OFF condition to an ON condition.

8. The transceiver as described in claim 7 wherein the demodulator is a spread spectrum despreader.

9. The transceiver as described in claim 8 wherein the PN sequence is a Barker sequence.

10. The transceiver as described in claim 7 wherein the A/D converters are flash A/D converters.

11. The transceiver as described in claim 7 wherein the analog correlator comprises an in-phase section comprising:

an analog multiplier for receiving a down-converted in-phase signal from the radio circuit and the bit sequence generated by the PN sequence generator and, in response thereto, generating a first signal;

an integrator and dump circuit for integrating the first signal over a given time period to generate a second signal;

a sample and hold circuit for sampling the second signal and generating a third signal; and

an analog squaring circuit for squaring the third signal and generating a fourth signal.

12. The transceiver as described in claim 7 wherein the analog correlator comprises an quadrature-phase section comprising:

an analog multiplier for receiving a down-converted quadrature-phase signal from the radio circuit and the bit sequence generated by the PN sequence generator and, in response thereto, generating a first signal;

an integrator and dump circuit for integrating the first signal over a given time period to generate a second signal;

a sample and hold circuit for sampling the second signal and generating a third signal; and

an analog squaring circuit for squaring the third signal and generating a fourth signal.

13. A spread spectrum transceiver for use in a wireless local area network (WLAN), comprising:

a radio circuit;

a baseband processor coupled to the radio circuit and including a spread spectrum despreader and digital circuitry for high quality signal detection;

an analog correlator for sniffing for a received signal; and

circuitry coupled to the analog correlator for selectively activating the digital circuitry to enable high quality signal detection;

wherein the analog correlator includes means for synchronizing a local PN sequence to a PN sequence in a received signal and, in response thereto, generating a given delay value.

14. The transceiver as described in claim 13 wherein the given delay value is used by the digital circuitry for a given correlation.

15. The transceiver as described in claim 13 wherein the WLAN is compliant with the IEEE 702.11 standard.