Memory record update filtering

• US 6,678,808 B2
• Filed: 03/11/2003
• Issued: 01/13/2004
• Est. Priority Date: 12/30/1999
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Bekerman, Michael, Jourdan, Stephan J., Ronen, Ronny
• Primary Examiner(s): Hudspeth, David
• Assistant Examiner(s): TZENG, FRED
• Application Number:
  US10/384,531
• Publication Number:
  US 20030140203A1
• Time in Patent Office: 308 Days
• Field of Search: 711/159, 711/133, 711/151, 711/118
• US Class Current: 711/159
• CPC Class Codes: G06F 12/126 with special data handling, e.g. priority of data or instructions, handling errors or pinning
• CPC Class Codes: G06F 9/3806 using address prediction, e.g. return stack, branch history buffer

Abstract

Apparatus and methods to filter memory record updates. A microprocessor can include a memory record update filter. The memory record update filter can include a table memory populated by a plurality of data entries. Each data entry can include a data tag field to store a data tag, a data field to store a data value, and a filter field to store a filter value. A first comparator can be in communication with the data tag field of the table memory and a data accessing information input to perform a data tag comparison. A second comparator can be in communication with the filter field of the table memory and a data value input. A control circuit can be in communication with the table memory, the first comparator, and the second comparator.

Claims

1. A filtered memory comprising:

first means for storing;

second means for storing;

first means for comparing a data tag field from said first means for storing and a data record accessing information input;

second means for comparing a filter tag field from said second means for storing and a data value input; and

means for enabling said filter memory to store said data value input coupled to said first means for comparing and said second means for comparing.

2. The filtered memory of claim 1 further comprising:

means for selecting between said data value input and said data accessing information input.

3. The filtered memory of claim 2 wherein said means for selecting comprises:

means for outputting coupled to said second means for storing and said second means for comparing.

4. The filtered memory of claim 1 wherein each filter tag field comprises:

means for storing a relevance counter value.

5. The filtered memory of claim 4 further comprising:

third means for comparing said relevance counter field and a relevance threshold value input.

6. The filtered memory of claim 5 wherein said third means for comparing is coupled to said means for enabling.

7. The filtered memory of claim 6 wherein said third means for comparing comprises:

means for outputting coupled to said means for enabling.

8. The filtered memory of claim 1 wherein said means for enabling comprises:

third means for comparing;

an AND gate coupled to said second means for comparing and said third means for comparing; and

an OR gate coupled to said AND gate and said first means for comparing;

said means for enabling to control the output of a data record update enable signal.

9. The filtered memory of claim 1 wherein said first means for storing and said second means for storing are each populated with a plurality of data entries.

10. The filtered memory of claim 9 wherein each of said plurality of data entries is to store a predicted value.

11. The filtered memory of claim 9 wherein each of said plurality of data entries is to store a branch target address;

and

the data accessing information input is to receive at least a portion of a branch instruction address.

12. The filtered memory of claim 9 wherein each of said plurality of data entries is to store a memory operation address;

and

the data accessing information input is to receive at least a portion of an instruction address.

13. The filtered memory of claim 9 wherein each of said plurality of data entries comprises:

said relevance counter field.

14. A filtered memory comprising:

means for providing a plurality of first entries having at least a tag field;

means for comparing coupled to said tag fields of said means for providing the plurality of first entries and having an input for address data; and

means for providing a plurality of second entries having a field to store data;

each of said plurality of second entries field to store data, upon a hit in the plurality of first entries.

15. The filtered memory of claim 14 further comprising:

means for selecting between said data value input and said data accessing information input.

16. The filtered memory of claim 14 wherein said means for selecting comprises:

means for outputting coupled to said second means for storing and said second means for comparing.

17. The filtered memory of claim 14 wherein each of said plurality of first entries tag fields has an associated relevance counter field to store a relevance counter value.

18. A machine-readable medium having stored thereon a plurality of executable instructions to perform a method comprising:

determining whether there has been a prior attempt to store a data item in a memory, during an attempt to store the data item in the memory; and

storing the data item in the memory during the attempt to store the data item in the memory, if there have been a threshold number of prior attempts to store the data item in the memory.

19. The machine-readable medium of claim 18 wherein the threshold number is one.

20. The machine-readable medium of claim 18 wherein storing the data item in the memory comprises:

storing the data item in the memory, if there has been one prior attempt to store the data item in the memory.

21. The machine-readable medium of claim 20 further comprises:

storing a data item in a second memory section, if it is determined that there has been a prior attempt to store the data item.

22. The machine-readable medium of claim 18 wherein said determining comprises:

reading from a first memory section a count value of prior attempts to store the data item.

23. The machine-readable medium of claim 22 further comprising:

allocating an entry in the first memory section for the data item, if there is no count value stored in the first memory section.

24. The machine-readable medium of claim 18 wherein said storing comprises:

storing the data item in a second memory section.