On-chip image reject filter

• US 6,681,103 B1
• Filed: 08/25/2000
• Issued: 01/20/2004
• Est. Priority Date: 08/25/2000
• Status: Expired due to Term

• Current Assignee: ThinkLogix, LLC (Ascend Innovation Management, LLC)
• Original Assignee: SIGE Semiconductor Incorporated (Skyworks Solutions Incorporated)
• Inventors: Rogers, John William Mitchell, Plett, Calvin
• Primary Examiner(s): Nguyen, Duc M.
• Application Number:
  US09/645,323
• Time in Patent Office: 1,243 Days
• Field of Search: 455/302, 455/307, 455/339, 455/340, 455/333, 455/191.2, 455/193.2, 455/193.3, 455/197.2, 455/197.3, 455/285, 455/287, 455/290, 455/291, 455/292, 455/293, 455/341, 455/342, 330/61.R, 330/61.A, 330/99, 330/100, 330/151, 330/310, 330/311
• US Class Current: 455/302
• CPC Class Codes: H03H 11/1213 using transistor amplifiers H03H11/1204 takes precedence; parallel-T filters H03H11/1295

Abstract

With the rising popularity in wireless personal communication systems (PCS), there is a need for low-power, low-cost radio receivers. Low cost can be achieved by integrating the required functions as much as possible, thus minimizing the number of off-chip components. The present invention discloses a novel topology for integrating an image reject filter with a traditional low-noise amplifier (LNA) for use in the front-end of a superheterodyne receiver. Previous topologies employing additional filter stages after the LNA have suffered from poor performance and excessive current consumption. Advantageously, the topology of the present invention requires minimal additional circuitry to perform the filtering function, uses only minimal additional current and does not suffer from the same performance limitations as previous topologies.

Claims

1. An integrated circuit comprising an image reject filter integrated monolithically with a low-noise amplifier (LNA) to reject an unwanted image frequency component of an input signal, the integrated circuit comprising:

a driving amplifier having a first conducting terminal for providing an output signal, a second conducting terminal connected to an inductive degeneration element and a control terminal for receiving the input signal;

a first resonant network coupled to the first conducting terminal of the driving amplifier for causing the driving amplifier to have a substantially high gain at a desired frequency of the input signal; and

a filtering network coupled to the second conducting terminal of the driving amplifier for providing a substantially high impedance to the second conducting terminal at the image frequency so as to cause the driving amplifier to have a substantially low gain at the image frequency;

wherein the filtering network comprises a tunable parallel LC resonator and a negative resistance generation network, whereby in operation the negative resistance generation network produces a negative resistance that substantially cancels inherent resistive losses of the LC resonator.

2. An integrated circuit according to claim 1 wherein the driving amplifier is a voltage-controlled current source.

3. An integrated circuit according to claim 1 wherein the driving amplifier is a current-controlled current source.

4. An integrated circuit according to claim 1 wherein the driving amplifier is a transistor.

5. An integrated circuit according to claim 4 wherein the transistor is a bipolar npn transistor having a collector terminal corresponding to the first conducting terminal, an emitter terminal corresponding to the second conducting terminal and a base terminal corresponding to the control terminal.

6. An integrated circuit according to claim 1 wherein the filtering network is coupled to the second conducting terminal of the driving amplifier by means of a transformer.

7. An integrated circuit according to claim 1 wherein the filtering network is coupled to the second conducting terminal of the driving amplifier by means of a coupling capacitor.

8. An integrated circuit according to claim 1 wherein the filtering network comprises a transistor having a first conducting terminal coupled to a first power rail, a second conducting terminal coupled to a current source and a control terminal coupled to the second conducting terminal of the driving amplifier, a feedback capacitor connected across the control and second conducting terminals, a bias resistor connected across the first conducting and control terminals and a varactor whose anode is connected to the second conducting terminal of the transistor and whose cathode is connected to an adjustable tuning voltage.

9. An integrated circuit according to claim 1 wherein a cascode transistor is interposed in the path between the driving amplifier and the first resonant network.

10. An integrated circuit according to claim 1 wherein the first resonant network comprises an inductor and a capacitor connected in a parallel combination, a first junction between the inductor and capacitor connected to a first power rail and a second junction between the inductor and capacitor connected to the first conducting terminal of the driving amplifier.

11. An integrated circuit comprising:

a multi-terminal circuit element having a first conducting terminal for providing an output signal, a second conducting terminal connected to an inductive degeneration element and a control terminal for receiving an input signal; and

a filtering network integrated monolithically with the multi-terminal circuit element and coupled to its second conducting terminal for providing a substantially high impedance to the second conducting terminal at an image frequency of the input signal so as to cause an unwanted image frequency component to be substantially eliminated in the output signal of the multi-terminal circuit element;

wherein the filtering network comprises a tunable parallel LC resonator and a negative resistance generation network, whereby in operation the negative resistance generation network produces a negative resistance that substantially cancels inherent resistive losses of the LC resonator.

12. An integrated circuit according to claim 11 wherein the multi-terminal circuit element is a mixer.

13. An integrated circuit according to claim 11 wherein the multi-terminal circuit element is a low-noise amplifier.