Online control of a multiprocessor computer system

• US 6,681,282 B1
• Filed: 08/31/2000
• Issued: 01/20/2004
• Est. Priority Date: 08/31/2000
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Golden, David, Donaldson, Darrel
• Primary Examiner(s): Ray, Gopal C.
• Application Number:
  US09/653,180
• Time in Patent Office: 1,237 Days
• Field of Search: 710/100, 710/302, 700/2, 714/13, 714/15, 709/223, 709/203, 709/104, 709/102, 709/213, 709/106, 709/226, 709/229, 370/254, 370/908, 711/147
• US Class Current: 710/302
• CPC Class Codes: H04L 69/40 for recovering from a failure of a protocol instance or entity, e.g. service redundancy protocols, protocol state redundancy or protocol service redirection management of faults, events, alarms or notifications in data switching networks H04L41/06
• CPC Class Codes: Y10S 370/908 Local area network

Abstract

A control system using microprocessors for communicating through a LAN to control operation of processors and input and output subsystems (IO system) of a multi-processor computer system. Each processor includes memory, and an IO system comprising a plurality of busses. The processors are cabled together in a mesh arrangement so that messages can be transferred between any of the processors and delivered to memory associated with the destination processor, or an IO system associated with the destination processor, etc. The processors and IO system are mounted in a rack, and an IO system is associated with each processor. A rack may be hot swapped. In hot swapping, the microprocessor control system computes new routing tables for messages through the new cabling arrangement. Microprocessors, IO devices, and processor boards may be hot swapped.

Claims

1. A multiprocessor computer system comprising:

a first plurality of processors interconnected so that they can share memory;

a plurality of microprocessors, one of said microprocessors associated with one or more processors of said plurality of processors;

a microprocessor memory associated with each microprocessor of said plurality of microprocessors;

a local area network through which said plurality of microprocessors communicate;

a data structure stored in each microprocessor memory of said plurality of microprocessors, said data structure giving coordinates and status of each of said processors; and

,

a process executing in each of said microprocessors, said process communicating with other microprocessors through said local area network, and in response to said data structure said process controlling said multiprocessor computer system to enable changes in said multiprocessor computer system to be made without halting execution of a second plurality of processors of said multiprocessor computer system.

2. The apparatus as in claim 1 further comprising:

said change is a processor being removed from said multiprocessor computer system.

3. The apparatus as in claim 1 further comprising:

said change is a processor being added to said multiprocessor computer system.

4. The apparatus as in claim 1 further comprising:

said change is a microprocessor being removed from said multiprocessor system.

5. The apparatus as in claim 1 further comprising:

said change is a microprocessor being added to said multiprocessor system.

6. The apparatus of claim 1 further comprising:

said second plurality of processors are members of a partition of said plurality of processors.

7. The apparatus of claim 1 further comprising:

a management computer communicating through said local area network with said microprocessors, said management computer having an input device such as a keyboard and mouse for entering commands to said plurality of microprocessors to modify said data structure in order to establish the processors belonging to a partition, said multiprocessor computer system supporting a plurality of said partitions; and

,

a process executing in said management computer for entry of data to said data structure upon the addition of a processor to said multiprocessor computer system to establish a partition to which said added processor is assigned.

8. The apparatus as in claim 1 further comprising:

an input/output (IO) subsystem associated with selected processors of said plurality of processors;

an IO microprocessor associated with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure; and

,

a process executing in said IO microprocessor, said process responsive to said data structure, said process enabling addition of said input/output subsystem to said multiprocessor computer system without interruption of execution of said processor of said multiprocessor computer system.

9. The apparatus as in claim 1 further comprising:

an input/output (IO) subsystem associated with selected processors of said plurality of processors;

an IO microprocessor associated with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure associated therewith; and

,

a process executing in said IO microprocessor, said process responsive to said data structure, said process enabling removal of said input/output subsystem from said multiprocessor computer system without interruption of execution of said processors of said multiprocessor computer system.

10. A method for operating a multiprocessor computer system, comprising:

interconnecting a first plurality of processors so that they can share memory;

associating a microprocessor with one or more processors of said plurality of processors, said microprocessors forming a plurality of microprocessors, a microprocessor memory associated with each said microprocessor;

establishing communication between said plurality of microprocessors through a local area network;

storing a data structure in each microprocessor memory of said plurality of microprocessors, said data structure giving coordinates and status of each of said processors; and

,

executing a process in each of said microprocessors, said process communicating with other microprocessors through said local area network, and in response to said data structure said process controlling said multiprocessor computer system to enable changes in said multiprocessor computer system to be made without halting execution of a second plurality of processors of said multiprocessor computer system.

11. The method of claim 10, further comprising:

establishing said change as a processor being removed from said multiprocessor computer system.

12. The method of claim 10, further comprising:

establishing said change as a processor being added to said multiprocessor computer system.

13. The method of claim 10, further comprising:

establishing said change as a microprocessor being removed from said multiprocessor system.

14. The method of claim 10, further comprising:

establishing said change as a microprocessor being added to said multiprocessor system.

15. The method of claim 10, further comprising:

establishing said second plurality of processors as members of a partition of said plurality of processors.

16. The method of claim 10, further comprising:

communicating by a management computer through said local area network with said microprocessors, said management computer having an input device such as a keyboard and mouse for entering commands to said plurality of microprocessors to modify said data structure in order to establish the processors belonging to a partition, said multiprocessor computer system supporting a plurality of said partitions; and

,

establishing a partition to which said added processor is assigned by a process executing in said management computer, said establishing a partition in response to data entered into said data structure through said management computer.

17. The method of claim 10, further comprising:

associating an input/output (IO) subsystem with selected processors of said plurality of processors;

associating an IO microprocessor with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure; and

,

adding an input/output subsystem to said multiprocessor computer system without interruption of execution of said processors of said multiprocessor computer system by a process executing in said IO microprocessors, said process assisting said adding in response to said data structure.

18. The method of claim 10, further comprising:

associating an input/output (IO) subsystem with selected processors of said plurality of processors;

associating an IO microprocessor with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure; and

,

removing an input/output subsystem to said multiprocessor computer system without interruption of execution of said processors of said multiprocessor computer system by a process executing in said IO microprocessors, said process assisting said removing in response to said data structure.

19. A multiprocessor computer system comprising:

a first plurality of processors;

a plurality of microprocessors, one of said microprocessors associated with one or more processors of said plurality of processors;

a local area network through which said plurality of microprocessors communicate; and

,

a process executing in each of said microprocessors, said process communicating with other microprocessors through said local area network, and said process controlling said multiprocessor computer system to enable changes in said multiprocessor computer system to be made without halting execution of other processors of said multiprocessor computer system.

20. The apparatus as in claim 19 wherein said first plurality of processors are interconnected so that they can share memory, and wherein said apparatus further comprises:

a microprocessor memory associated with each microprocessor of said plurality of microprocessors; and

a data structure stored in each microprocessor memory of said plurality of microprocessors, said data structure giving coordinates and status of each of said processors;

said process controlling said multiprocessor computer system in response to said data structure.

21. The apparatus as in claim 19 further comprising:

said change is a processor being removed from said multiprocessor computer system.

22. The apparatus as in claim 19 further comprising:

said change is a processor being added to said multiprocessor computer system.

23. The apparatus as in claim 19 further comprising:

said change is a microprocessor being removed from said multiprocessor system.

24. The apparatus as in claim 19 further comprising:

said change is a microprocessor being added to said multiprocessor system.

25. The apparatus of claim 19 further comprising:

said second plurality of processors are members of a partition of said plurality of processors.

26. The apparatus of claim 19 further comprising:

a management computer communicating through said local area network with said microprocessors, said management computer having an input device such as a keyboard and mouse for entering commands to said plurality of microprocessors to modify said data structure in order to establish the processors belonging to a partition, said multiprocessor computer system supporting a plurality of said partitions; and

,

a process executing in said management computer for entry of data to said data structure upon the addition of a processor to said multiprocessor computer system to establish a partition to which said added processor is assigned.

27. The apparatus as in claim 19 further comprising:

an input/output (IO) subsystem associated with selected processors of said plurality of processors;

an IO microprocessor associated with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure; and

,

a process executing in said IO microprocessor, said process responsive to said data structure, said process enabling addition of said input/output subsystem to said multiprocessor computer system without interruption of execution of said processor of said multiprocessor computer system.

28. The apparatus as in claim 19 further comprising:

an input/output (IO) subsystem associated with selected processors of said plurality of processors;

an IO microprocessor associated with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure associated therewith; and

,

a process executing in said IO microprocessor, said process responsive to said data structure, said process enabling removal of said input/output subsystem from said multiprocessor computer system without interruption of execution of said processors of said multiprocessor computer system.

29. A method for operating a multiprocessor computer system, comprising:

interconnecting a first plurality of processors;

associating a microprocessor with one or more processors of said plurality of processors, said microprocessors forming a plurality of microprocessors;

establishing communication between said plurality of microprocessors through a local area network; and

,

executing a process in each of said microprocessors, said process communicating with other microprocessors through said local area network, and said process controlling said multiprocessor computer system to enable changes in said multiprocessor computer system to be made without halting execution of other processors of said multiprocessor computer system.

30. The method of claim 29, wherein said first plurality of processors are interconnected so that they can share memory, and wherein said method further comprises:

associating a microprocessor memory with each microprocessor of said plurality of microprocessors; and

storing a data structure in each microprocessor memory of said plurality of microprocessors, said data structure giving coordinates and status of each of said processors;

said process controlling said multiprocessor computer system in response to said data structure.

31. The method of claim 29, further comprising:

establishing said change as a processor being removed from said multiprocessor computer system.

32. The method of claim 29, further comprising:

establishing said change as a processor being added to said multiprocessor computer system.

33. The method of claim 29, further comprising:

establishing said change as a microprocessor being removed from said multiprocessor system.

34. The method of claim 29, further comprising:

establishing said change as a microprocessor being added to said multiprocessor system.

35. The method of claim 29, further comprising:

establishing said second plurality of processors as members of a partition of said plurality of processors.

36. The method of claim 29, further comprising:

communicating by a management computer through said local area network with said microprocessors, said management computer having an input device such as a keyboard and mouse for entering commands to said plurality of microprocessors to modify said data structure in order to establish the processors belonging to a partition, said multiprocessor computer system supporting a plurality of said partitions; and

,

establishing a partition to which said added processor is assigned by a process executing in said management computer, said establishing a partition in response to data entered into said data structure through said management computer.

37. The method of claim 29, further comprising:

associating an input/output (IO) subsystem with selected processors of said plurality of processors;

associating an IO microprocessor with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure; and

,

adding an input/output subsystem to said multiprocessor computer system without interruption of execution of said processors of said multiprocessor computer system by a process executing in said IO microprocessors, said process assisting said adding in response to said data structure.

38. The method of claim 29, further comprising:

associating an input/output (IO) subsystem with selected processors of said plurality of processors;

associating an IO microprocessor with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure; and

,

removing an input/output subsystem to said multiprocessor computer system without interruption of execution of said processors of said multiprocessor computer system by a process executing in said IO microprocessors, said process assisting said removing in response to said data structure.

39. A multiprocessor computer system, comprising:

means for interconnecting a first plurality of processors so that they can share memory;

means for associating a microprocessor with one or more processors of said plurality of processors, said microprocessors forming a plurality of microprocessors, a microprocessor memory associated with each said microprocessor;

means for establishing communication between said plurality of microprocessors through a local area network;

means for storing a data structure in each microprocessor memory of said plurality of microprocessors, said data structure giving coordinates and status of each of said processors; and

,

means for executing a process in each of said microprocessors, said process communicating with other microprocessors through said local area network, and in response to said data structure said process controlling said multiprocessor computer system to enable changes in said multiprocessor computer system to be made without halting execution of a second plurality of processors of said multiprocessor computer system.

40. The apparatus of claim 39, further comprising:

means for establishing said change as a processor being removed from said multiprocessor computer system.

41. The apparatus of claim 39, further comprising:

means for establishing said change as a processor being added to said multiprocessor computer system.

42. The apparatus of claim 39, further comprising:

means for establishing said change as a microprocessor being removed from said multiprocessor system.

43. The apparatus of claim 39, further comprising:

means for establishing said change as a microprocessor being added to said multiprocessor system.

44. The apparatus of claim 39, further comprising:

means for establishing said second plurality of processors as members of a partition of said plurality of processors.

45. The apparatus of claim 39, further comprising:

means for communicating by a management computer through said local area network with said microprocessors, said management computer having an input device such as a keyboard and mouse for entering commands to said plurality of microprocessors. to modify said data structure in order to establish the processors belonging to a partition, said multiprocessor computer system supporting a plurality of said partitions; and

,

means for establishing a partition to which said added processor is assigned by a process executing in said management computer, said establishing a partition in response to data entered into said data structure through said management computer.

46. The apparatus of claim 39, further comprising:

means for associating an input/output (IO) subsystem with selected processors of said plurality of processors;

means for associating an IO microprocessor with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure; and

,

means for adding an input/output subsystem to said multiprocessor computer system without interruption of execution of said processors of said multiprocessor computer system by a process executing in said IO microprocessors, said process assisting said adding in response to said data structure.

47. The apparatus of claim 39, further comprising:

means for associating an input/output (IO) subsystem with selected processors of said plurality of processors;

means for associating an IO microprocessor with each said IO subsystem, said IO microprocessor communicating with said microprocessors through said local area network, each said IO microprocessor having an IO microprocessor memory holding a copy of said data structure; and

,

means for removing an input/output subsystem to said multiprocessor computer system without interruption of execution of said processors of said multiprocessor computer system by a process executing in said IO microprocessors, said process assisting said removing in response to said data structure.