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Smart memory

  • US 6,681,287 B2
  • Filed: 07/02/2001
  • Issued: 01/20/2004
  • Est. Priority Date: 07/02/2001
  • Status: Expired due to Fees
First Claim
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1. A smart memory integrated-circuit device, comprising:

  • a memory array section;

    a special-function section that provides a function other than an exclusive memory function and that is packaged with the memory array section in a single smart memory integrated-circuit package; and

    wherein said single smart memory integrated-circuit package incorporates all memory functions of a standard memory that are provided by the memory array section in addition to a special function that is provided by the special-function section in the single integrated-circuit package; and

    wherein the special-function section that provides a function other than an exclusive memory function is connected to the memory array section through a common internal bus within the smart memory integrated-circuit package to thereby significantly reduce the need for the memory array section to communicate with another external, baseband integrated-circuit through an external common bus that has significantly greater propagation delay, parasitic capacitance, inductance, and resistance and that is required to be driven with higher current interface driving circuits.

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