Formation of well-controlled thin SiO, SiN, SiON layer for multilayer high-K dielectric applications

• US 6,682,973 B1
• Filed: 05/16/2002
• Issued: 01/27/2004
• Est. Priority Date: 05/16/2002
• Status: Active Grant

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Paton, Eric N., Xiang, Qi, Yu, Bin
• Primary Examiner(s): Everhart, Caridad
• Assistant Examiner(s): Luu, Chuong A
• Application Number:
  US10/147,650
• Time in Patent Office: 621 Days
• Field of Search: 438/3, 438/240, 257/295, 257/310
• US Class Current: 438/240
• CPC Class Codes: H01L 21/02126 the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
• CPC Class Codes: H01L 21/0214 the material being a silicon oxynitride, e.g. SiON or SiON:H
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02236 group IV semiconductor
• CPC Class Codes: H01L 21/02238 silicon in uncombined form, i.e. pure silicon
• CPC Class Codes: H01L 21/02247 formation by nitridation, e.g. nitridation of the substrate
• CPC Class Codes: H01L 21/02249 formation by combined oxidation and nitridation performed simultaneously
• CPC Class Codes: H01L 21/02255 formation by thermal treatment H01L21/02252 takes precedence; after treatment of an insulating film H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/2807 the final conductor layer next to the insulator being Si or Ge or C and their alloys except Si
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/31604 Deposition from a gas or vapour H01L21/31691, H01L21/31695 take precedence
• CPC Class Codes: H01L 21/31662 of silicon in uncombined form
• CPC Class Codes: H01L 21/31691 with perovskite structure
• CPC Class Codes: H01L 28/56 the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
• CPC Class Codes: H01L 29/40111 the electrodes comprising a layer which is used for its ferroelectric properties
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 : the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Abstract

A process for fabricating a semiconductor device having a high-K dielectric layer over a silicon substrate, including steps of growing on the silicon substrate an interfacial layer of a silicon-containing dielectric material; and depositing on the interfacial layer a layer comprising at least one high-K dielectric material, in which the interfacial layer is grown by laser excitation of the silicon substrate in the presence of oxygen, nitrous oxide, nitric oxide, ammonia or a mixture of two or more thereof. In one embodiment, the silicon-containing material is silicon dioxide, silicon nitride, silicon oxynitride or a mixture thereof.

Claims

1. A process for fabricating a semiconductor device having a high-K dielectric layer over a silicon substrate, comprising:

growing on the silicon substrate an interfacial layer of a silicon-containing dielectric material; and

depositing on the interfacial layer a layer comprising at least one high-K dielectric material,

wherein the interfacial layer is grown by laser excitation of the silicon substrate in the presence of oxygen, nitrous oxide, nitric oxide, ammonia or a mixture of two or more thereof,

and wherein the high-K dielectric material comprises at least one of hafnium oxide(HfO₂), zirconium oxide(ZrO₂), tantalum oxide(Ta₂O₅), barium titanate (BaTiO₃), titanium dioxide(TiO₂), cerium oxide(CeO₂), lanthanum oxide(La₂O₃), lead titanate (PbTiO₃), silicon titanate(SrTiO₃), lead zirconate(PbZrO₃), tungsten oxide(WO₃), yttrium oxide (Y₂O₃), bismuth silicon oxide(Bi₁Si₂O₁₂), barium strontium titanate(BST)(Ba<sub>1−

x</sub>Sr_xTiO₃), PMN (PbMg_xNb<sub>1−

x</sub>O₃), PZT(pbZr_xTi<sub>1−

x</sub>O₃), PZN (PbZn_xNb<sub>1−

x</sub>O₃), and PST(PbSc_xTa<sub>1−

x</sub>O₃).

2. The process of claim 1, wherein the silicon-containing dielectric material is silicon dioxide, silicon nitride, silicon oxynitride or a mixture thereof.

3. The process of claim 1, wherein the laser excitation uses a laser operating in the ultraviolet wavelength range.

4. The process of claim 1, wherein the layer of high-K dielectric material is deposited by ALCVD, RTCVD or MOCVD.

5. The process of claim 1, flier comprising depositing on the layer of high-K dielectric material an interfacial barrier layer of a dielectric material.

6. The process of claim 5, wherein the interfacial barrier layer comprises a dielectric material comprising aluminum oxide, silicon oxynitride, silicon nitride or mixtures thereof.

7. The process of claim 5, wherein the interfacial barrier layer is deposited by ALCVD, RTCVD or MOCVD.

8. The process of claim 5, further comprising depositing a polysilicon or polysilicon-germanium layer over the interfacial barrier layer.

9. A process for fabricating a semiconductor device having a high-K dielectric layer over a silicon substrate, comprising:

growing on the silicon substrate an interfacial layer of a dielectric material comprising silicon dioxide, silicon nitride, silicon oxynitride or a mixture thereof; and

depositing on the interfacial layer by ALCVD, RTCVD or MOCVD a layer comprising at least one high-K dielectric material,

wherein the interfacial layer is grown by laser excitation of the silicon substrate in the presence of oxygen, nitrous oxide, nitric oxide, ammonia or a mixture of two or more thereof,

and wherein the high-K dielectric material comprises at least one of hafnium oxide(HfO₂), zirconium oxide(ZrO₂), tantalum oxide(Ta₂O₅), barium titanate(BaTiO₃), titanium dioxide(TiO₂), cerium oxide(CeO₂), tantalum oxide(La₂O₃), lead titanate(PbTiO₃), silicon titanate(SrTiO₃), lead zirconate(PbZro₃), tungsten oxide(WO₃) yttrium oxide (Y₂O₃), bismuth silicon oxide(Bi₁Si₂O₁₂), barium strontium titanate(BST)(Ra<sub>1−

x</sub>Sr_xTiO₃), PMN(PbMg_xNb<sub>1−

x</sub>O₃), PZT(PbZr_xTi<sub>1−

x</sub>O₃), PZN(PbZn_xNb<sub>1−

x</sub>O₃), and PST(PbSc_xTa<sub>1−

x</sub>O₃).

10. The process of claim 9, wherein the laser excitation uses a laser operating in the ultraviolet wavelength range.

11. The process of claim 9, further comprising depositing on the layer of high-K dielectric material an interfacial barrier layer of a dielectric material.

12. The process of claim 11, wherein the interfacial barrier layer comprises a dielectric material comprising aluminum oxide, silicon oxynitride, silicon nitride or mixtures thereof.

13. The process of claim 11, wherein the interfacial barrier layer is deposited by ALCVD, RTCVD or MOCVD.

14. The process of claim 11, further comprising depositing a polysilicon or polysilicon-germanium layer over the interfacial barrier layer.

15. A process for fabricating a semiconductor device having a high-K dielectric layer over a silicon substrate, comprising:

growing on the silicon substrate an interfacial layer of a dielectric material comprising silicon dioxide, silicon nitride, silicon oxynitride or a mixture thereof;

depositing on the interfacial layer by ALCVD, RTCVD or MOCVD a layer comprising at least one high-K dielectric material;

depositing on the layer comprising at least one high-K dielectric material an interfacial barrier layer; and

forming a gate electrode on the interfacial barrier layer,

wherein the interfacial layer is grown by laser excitation of the silicon substrate in the presence of oxygen, nitrous oxide, nitric oxide, ammonia or a mixture of two or more thereof,

and wherein the high-K dielectric material comprises at least one of hafnium oxide(HfO₂), zirconium oxide(ZrO₂), tantalum oxide(Ta₂O₅), barium titanate(BaTiO₃), tanium dioxide(TiO₂), cerium oxide(CeO₂), lanthanum oxide(La₂O₃), lead titanate(PbTiO₃), silicon titanate(SrTiO₃), lead zirconate(PbZrO₃), tungsten oxide(WO₃), yttrium oxide(Y₂O₃), bismuth silicon oxide(Bi₁Si₂O₁₂), barium strontium titanate(BST)(Ba<sub>1−

x</sub>Sr_xTiO₃), PMN(PbMg_xNb<sub>1−

x</sub>O₃), PZT(PbZr_xTi<sub>1−

x</sub>O₃), PZN(PbZn_xNb<sub>1−

x</sub>O₃), and PST(PbSc_xO₃).

16. The process of claim 15, wherein the interfacial barrier layer comprises a dielectric material comprising aluminum oxide, silicon oxynitride, silicon nitride or mixtures thereof.

17. The process of claim 16, wherein the interfacial barrier layer is deposited by ALCVD, RTCVD or MOCVD.

18. The process of claim 15, wherein the laser is an ultraviolet laser.