Variable gain amplifier for low voltage applications

• US 6,684,065 B2
• Filed: 12/20/2000
• Issued: 01/27/2004
• Est. Priority Date: 12/20/1999
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Vorenkamp, Pieter, Venes, Arnoldus, Bult, Klaas, van de Plassche, Rudy
• Primary Examiner(s): VUONG, QUOCHIEN B
• Application Number:
  US09/747,159
• Publication Number:
  US 20010041548A1
• Time in Patent Office: 1,133 Days
• Field of Search: 455/127.2, 455/232.1, 455/234.1, 455/245.1, 455/250.1, 455/252.1, 330/69, 330/250, 330/252, 330/254, 330/278
• US Class Current: 455/252.1
• CPC Class Codes: H03F 1/34 Negative-feedback-circuit arrangements with or without positive feedback H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence ; for rejection of common mode signals H03F3/45479
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/331 Sigma delta modulation being used in an amplifying circuit
• CPC Class Codes: H03F 2200/372 Noise reduction and elimination in amplifier
• CPC Class Codes: H03F 2200/513 the amplifier being made for low supply voltages
• CPC Class Codes: H03F 2203/45644 the LC comprising a cross coupling circuit, e.g. comprising two cross-coupled transistors
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03F 3/45188 Non-folded cascode stages
• CPC Class Codes: H03F 3/45192 Folded cascode stages
• CPC Class Codes: H03G 1/0029 using FETs
• CPC Class Codes: H03G 3/30 in amplifiers having semiconductor devices
• CPC Class Codes: H04B 2001/0433 with linearisation using feedback

Abstract

An integrated communications system. Comprising a substrate having a receiver disposed on the substrate for converting a received signal to an IF signal. Coupled to a VGA for low voltage applications and coupled to the receiver for processing the IF signal. The VGA includes a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors. The bank pair is cross-coupled in parallel, the IF signal is applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages. A digital IF demodulator is disposed on the substrate and coupled to the VGA for low voltage applications, for converting the IF signal to a demodulated baseband signal. And a transmitter is disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

Claims

1. An integrated communications system comprising:

a substrate;

a receiver disposed on the substrate for converting a received signal to an IF signal;

a VGA for low voltage applications coupled to the receiver for processing the IF signal, the VGA including a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors, the bank pair being cross-coupled in parallel, the IF signal being applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages;

a digital IF demodulator disposed on the substrate and coupled to the VGA for low voltage applications for converting the IF signal to a demodulated baseband signal; and

a transmitter disposed on the substrate operating in cooperation with the receiver to establish a two way communications path.

2. An integrated receiver system comprising:

a substrate;

a receiver disposed on the substrate for converting a received signal to an IF signal;

a VGA for low voltage applications coupled to the receiver for processing the IF signal, the VGA including a bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors, the bank pair being cross-coupled in parallel, the IF signal being applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages; and

a digital IF demodulator disposed on the substrate for converting the IF signal processed by the VGA for low voltage applications to a demodulated baseband signal.

3. A VGA for low voltage applications comprising:

a substrate; and

a bank pair disposed on the substrate, the bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors, the bank pair being cross-coupled in parallel, the bank pair being responsive to an IF signal applied to the bank pair decoupled from a control signal used to control transconductance output gain of the bank pair over a range of input voltages.

4. A method for providing linear transconductance output gain of a bank pair over a range of differential input voltages, the bank pair having a first bank of differential pairs of transistors and a second bank of differential pairs of transistors, the bank pair being cross-coupled in parallel, each bank pair having a plurality of differential pairs of transistors, each differential pair of transistors having a first transistor, each first transistor having a first transistor drain coupled to a first differential pair output, a second transistor, each second transistor having a second transistor drain coupled to a second differential pair output, each first transistor having a first transistor source and each second transistor having a second transistor source, the first transistor source and the second transistor source being coupled to a respective current source for each differential pair of transistors, comprising:

coupling a second transistor gate of each of the second transistors of the first bank to a respective first transistor gate of each of the first transistors of the second bank;

applying a first differential input voltage to first transistor gates of each first transistor of the first bank;

applying a second differential input voltage to second transistor gates of each second transistor of the second bank;

applying a differential reference voltage across a resistive ladder coupled between the respective second transistor gates of the first and the respective first transistor gates of the second bank; and

varying the current through the resistive ladder to control transconductance output gain of the bank pair over the range of input voltages.

5. A method for providing linear transconductance output gain over a range of differential input voltages for a first bank pair and a second bank pair of differential pairs of transistors cross-coupled in parallel, each bank pair having a plurality of differential pairs of transistors, each differential pair of transistors having a first transistor, each first transistor having a first transistor drain coupled to a first differential pair output, a second transistor, each second transistor having a second transistor drain coupled to a second differential pair output, each first transistor having a first transistor source and each second transistor having a second transistor source, the first transistor source and the second transistor source being coupled to a respective current source for each differential pair of transistors, comprising:

coupling a second transistor gate of each of the second transistors of the first bank pair to a respective first transistor gate of each of the first transistors of the second bank pair;

applying a first differential input voltage to first transistor gates of each first transistor of the first bank of the bank pair;

applying a second differential input voltage to second transistor gates of each second transistor of the second bank of the bank pair;

applying a differential reference voltage across a resistive ladder coupled between the respective second transistor gates of the first bank pair and the respective first transistor gates of the second bank pair; and

increasing the current through the resistive ladder to lower transconductance output gain while expanding the range of input voltages.