Method for design and manufacture of semiconductors

• US 6,686,253 B2
• Filed: 04/11/2001
• Issued: 02/03/2004
• Est. Priority Date: 10/28/1999
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: eASIC Corporation (Intel Corporation)
• Inventors: Or-Bach, Zvi
• Primary Examiner(s): Picard, Leo
• Assistant Examiner(s): Rao, Sheela S
• Application Number:
  US09/829,939
• Publication Number:
  US 20010036688A1
• Time in Patent Office: 1,028 Days
• Field of Search: 700/121, 700/125, 438/401, 438/462, 709/200, 709/218
• US Class Current: 438/401
• CPC Class Codes: G06F 2111/02 CAD in a network environment, e.g. collaborative CAD or distributed simulation
• CPC Class Codes: G06F 2115/08 Intellectual property [IP] blocks or IP cores
• CPC Class Codes: G06F 2115/10 Processors
• CPC Class Codes: G06F 30/30 Circuit design

Abstract

This invention discloses a method for designing and manufacturing semiconductors including the steps of: (i) producing a fab-ready design for a semiconductor device by importing into the design at least one core from a remote source, the core bearing an identification indicium, (ii) utilizing the fab-ready design to fabricate the semiconductor device, and (iii) reading the identification indicium from the semiconductor device to indicate incorporation of the at least one core therein.

Claims

1. A method for design and manufacture of semiconductors comprising:

producing a design for a semiconductor device by importing into the design at least one core from a remote source, the core bearing an identification indicium;

utilizing said design to fabricate a semiconductor device, and

reading the identification indicium from mask data used for the semiconductor device to indicate incorporation of the at least one core therein.

2. A method according to claim 1 and wherein the importing step includes communication of the core via a communications link.

3. A method according to claim 1 and wherein the importing step includes communication of the core via the Internet.

4. A method according to claim 1 and wherein the reading step is associated with a reporting step which preferably includes reporting the quantities of cores fabricated.

5. A method according to claim 4 and wherein the producing step comprises interaction between a customer and a core provider'"'"'s web site.

6. A method according to claim 5 and wherein the core provider'"'"'s web site provides a searchable database describing various cores which are commercially available for use by designers as well as core data suitable for download.

7. A method according to claim 6 and wherein the core data bears embedded identification indicia, which enables the presence of the core data to be readily identified downstream when the core is embedded in a chip design.

8. A method according to claim 7 and wherein the identification indicia enables updated versions of the core data to be readily cataloged and identified to ensure that the most updated version is incorporated in the chip design.

9. A method according to claim 5 and wherein the cores which are provided via the core provider'"'"'s web site are programmable cores.

10. A method according to claim 5 and wherein the cores which are provided via the core provider'"'"'s web site are customizable cores.

11. A method according to claim 6 and wherein the providing step includes a step wherein the customer after having defined his requirements dials up to the core provider'"'"'s web site, identifies a core which appears to fit his requirements and downloads the core data, bearing the embedded identification indicia.

12. A method according to claim 1 and wherein the embedded identification indicium can be extracted by combining layers of mask data together.

13. A method according to claim 1 and wherein the embedded identification indicium can be combined with other layers of the mask data to create a correct mask.

14. A method according to claim 1 and wherein said embedded identification indicium can be extracted from the fabricated chip that contains the embedded core or cores.

15. A method according to claim 1 and wherein said design is a fab-ready design.

16. A method according to claim 15 and wherein the importing step includes communication of the core via the Internet.

17. A method according to claim 15 and wherein the reading step is associated with a reporting step which preferably includes reporting the quantities of cores fabricated.

18. A method according to claim 17 and wherein the producing step comprises interaction between a customer and a core provider'"'"'s web site.

19. A method for design and manufacture of semiconductors comprising:

producing a design for a semiconductor device by importing into the design at least one core from a remote source, the core bearing an identification indicium;

providing said design and said identification indicium to a third party,

wherein said third party utilizes said identification indicium to derive data of said at least one core, and utilizing said design to fabricate the semiconductor device.

20. A method according to claim 19 and wherein said data of said at least one core is fab-ready data.

21. A method according to claim 20 and wherein said design is a fab-ready design.

22. A method according to claim 21 and wherein the importing step includes communication of the core via the Internet.

23. A method according to claim 22 and also comprising a step reading the identification indicium to indicate incorporation of the at least one core therein.

24. A method according to claim 23 and wherein the reading step is associated with a reporting step which preferably includes reporting the quantities of cores fabricated.

25. A method for designing and manufacturing of semiconductors comprising:

a library of plurality of customizable devices, wherein each of said plurality of devices includes an identification code of the ownership of the device.

26. A method according to claim 25 wherein said customizable device is customized for a specific application.

27. A method according to claim 26 wherein said plurality of customizable devices is associated with at least two independent ownership.

28. A method according to claim 27 and wherein the method of designing and manufacturing comprises interaction between a customer and web site hosting said library.

29. A method according to claim 28 and wherein said web site provides a searchable database describing various customizable devices which are commercially available for use by designers as well as devices'"'"' data suitable for download.

30. A method according to claim 29 and wherein at least one of said customizable devices comprises one core, and wherein said core bears an identification indicium.

31. A method according to claim 29 and also comprising the step of fabrication said customizable device, and reading the identification indicium to indicate incorporation of the at least one core therein.

32. A method according to claim 31 and wherein the reading step is associated with a reporting step which preferably includes reporting the quantities of cores fabricated.

33. A method for design and manufacture of semiconductors comprising:

a library of plurality of programmable devices, wherein each of said plurality of devices includes an identification code of the ownership of the device.

34. A method according to claim 33 wherein said plurality of programmable devices is associated with at least two independent ownership.

35. A method according to claim 34 and wherein the method of designing and manufacturing comprises interaction between a customer and web site hosting said library.

36. A method according to claim 35 and wherein said web site provides a searchable database describing various programmable devices which are commercially available for use by designers as well as devices'"'"' data suitable for downloading.

37. A method according to claim 36 and wherein at least one of said programmable devices comprises one core, and said core is bearing an identification indicium.

38. A method according to claim 37 and wherein said method also comprises the step of fabrication said programmable device, and reading the identification indicium to indicate incorporation of the at least one core therein.

39. A method according to claim 38 and wherein the reading step is associated with a reporting step which preferably includes reporting the quantities of cores fabricated.