Low current redundancy anti-fuse method and apparatus

• US 6,686,790 B2
• Filed: 02/27/2001
• Issued: 02/03/2004
• Est. Priority Date: 10/03/1996
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ho, Fan, Beigel, Kurt D., Cutter, Douglas J.
• Primary Examiner(s): Cunningham, Terry D.
• Assistant Examiner(s): Tra, Quan
• Application Number:
  US09/794,707
• Publication Number:
  US 20010006351A1
• Time in Patent Office: 1,071 Days
• Field of Search: 327/525, 327/526
• US Class Current: 327/525
• CPC Class Codes: G11C 17/18 Auxiliary circuits, e.g. for writing into memory
• CPC Class Codes: G11C 29/785 with redundancy programming schemes
• CPC Class Codes: G11C 29/83 with reduced power consumption

Abstract

A programmable circuit includes a first node and provides a programmed signal based on the state of the first node. A first anti-fuse has a programmed state and an unprogrammed state and couples the first node to a first power supply when in the programmed state and decouples the first node from the first power supply when in the unprogrammed state. A second anti-fuse has a programmed state and an unprogrammed state and couples the first node to a second power supply when in the programmed state and decouples the first node from the second power supply when in the unprogrammed state. The state of the programmed signal can be used to replace a primary circuit element of an integrated circuit with a redundant circuit element.

Claims

1. A method of programming an integrated circuit comprising:

providing an enable signal having a non-enable state and an enable state;

providing a programming signal having a programming state and a non-programming state;

providing a first power supply which is switchable between a first bus voltage and a VCC voltage;

providing a second power supply which is switchable between a second bus voltage and a ground voltage;

programming exactly one anti-fuse of a first anti-fuse and a second anti-fuse interposed between the first power supply and the second power supply based on switched states of both the first voltage supply and the second voltage supply and the programming signal being in the programming state, thereby substantially eliminating standby current between the first power supply and the second power supply; and

providing a programmed signal from a programmable circuit, wherein the programmed signal has a first potential from the first power supply in response to the enable signal being in the enable state, the first anti-fuse being programmed and the second anti-fuse being unprogrammed, and the programmed signal has a second potential from the second power supply in response to the enable signal being in the enable state, the second anti-fuse being programmed and the first anti-fuse being unprogrammed;

wherein the programmed signal assumes a determined potential when exactly one of the first anti-fuse and the second anti-fuse is programmed.

30. The method of claim 1, wherein providing the enable signal includes providing an EN* to a gate of a first transistor that has either its source or drain connected to a node intermediate the first anti-fuse and the second anti-fuse.

31. The method of claim 30, wherein providing the programming signal includes providing the programming signal to a gate of a second transistor that has either its source or drain connected to a node intermediate the first anti-fuse and the second anti-fuse.

32. The method of claim 31, wherein providing the programming signal includes providing a PRG* signal, FBSEL* signal, and an Am* signal to a logic circuit to produce the programming signal.

33. The method of claim 1, wherein providing the programming signal includes providing a PRG* signal, FBSEL* signal, and an Am* signal to a logic circuit to produce the programming signal.

2. A method of programming an integrated circuit comprising:

providing an enable signal having a non-enable state and an enable state;

providing a programming signal having a programming state and a non-programming state;

providing a first power supply which is switchable between a first bus voltage and a VCC voltage;

providing a second power supply which is switchable between a second bus voltage and a ground voltage;

programming exactly one anti-fuse of a first anti-fuse and a second anti-fuse interposed between the first power supply and the second power supply based on switched states of both the first voltage supply and the second voltage supply and the programming signal being in the programming state, wherein no long-L p-channel pull-up transistor is interposed between the first power supply and either anti-fuse and wherein no long-L p-channel pull-up transistor is interposed between the second power supply and either anti-fuse; and

providing a programmed signal from a programmable circuit, wherein the programmed signal has a first potential from the first power supply in response to the enable signal being in the enable state, the first anti-fuse being programmed and the second anti-fuse being unprogrammed, and the programmed signal has a second potential from the second power supply in response to the enable signal being in the enable state, the second anti-fuse being programmed and the first anti-fuse being unprogrammed;

wherein the programmed signal assumes a determined potential when exactly one of the first anti-fuse and the second anti-fuse is programmed.

3. A method for producing a programmed signal, comprising:

receiving n address bits in an integrated circuit;

selecting primary circuit elements based on binary values of the n address bits; and

coupling each of a plurality of programmable circuits to a first power supply and a second power supply;

producing a programmed signal from the plurality of programmable circuits corresponding to one of the possible binary values of at least one of the n address bits; and

wherein producing the programmed signal includes;

selectively coupling a first node to a first power supply by a first anti-fuse when in a programmed state and decoupling the first node from the first power supply when in an unprogrammed state; and

selectively coupling the first node to a second power supply by a second anti-fuse when in a programmed state and decoupling the first node from the second power supply when in an unprogrammed state;

assigning a determined state to the first node when exactly one of the first and second anti-fuses is in the programmed state; and

basing the state of the programmed signal on the state of the first node.

5. The method of claim 3, wherein selectively coupling a first node to a first power supply by a first anti-fuse integrated circuit includes holding the first power supply at approximately Vcc.

6. The method of claim 3, wherein selectively coupling a first node to a first power supply by a first anti-fuse integrated circuit includes holding the first power supply at approximately Vcc/2.

7. The method of claim 3, wherein selectively coupling the first node to a second power supply by a second anti-fuse includes holding the second power supply at a ground potential.

4. A method for producing a programmed signal, comprising:

receiving n address bits in an integrated circuit;

selecting primary circuit elements based on binary values of the n address bits; and

coupling each of a plurality of programmable circuits to a first power supply and a second power supply;

producing a programmed signal from the plurality of programmable circuits corresponding to one of the possible binary values of at least one of the n address bits;

wherein producing the programmed signal includes;

selectively coupling a first node to a first power supply by a first anti-fuse when in a programmed state and decoupling the first node from the first power supply when in an unprogrammed state; and

selectively coupling the first node to a second power supply by a second anti-fuse when in a programmed state and decoupling the first node from the second power supply when in an unprogrammed state;

assigning a determined state to the first node when exactly one of the first and second anti-fuses is in the programmed state; and

basing the state of the programmed signal on the state of the first node

wherein selecting primary circuit elements includes;

coupling a compare circuit to the plurality of programmable circuits;

activating a match signal in response to all of the programmed signals being active;

disabling a primary circuit element from being selected by a corresponding binary value of the n address bits based on the match signal; and

enabling a redundant circuit element to be selected by the corresponding binary value of the n address bits.

34. The method of claim 4 wherein selectively coupling a first node to a first power supply by a first anti-fuse integrated circuit includes holding the first power supply at approximately Vcc.

35. The method of claim 4, wherein selectively coupling a first node to a first power supply by a first anti-fuse integrated circuit includes holding the first power supply at approximately Vcc/2.

36. The method of claim 4, wherein selectively coupling the first node to a second power supply by a second anti-fuse includes holding the second power supply at a ground potential.

8. A method, comprising:

selecting primary circuit elements based on binary values of n address bits;

coupling a programmable circuit to a first power supply and a second power supply;

providing a programmed signal corresponding to one of the possible binary values of at least one of the n address bits;

activating the programmed signal in response to a binary value of the at least one of the n address bits when the binary value of the at least one of the n address bits corresponds to the programmed signal;

wherein activating the programmed signal includes;

selectively coupling a first node to a first power supply via a first anti-fuse when in a programmed state and decoupling the first node from the first power supply when in an unprogrammed state; and

selectively coupling the first node to a second power supply via a second anti-fuse when in a programmed state and decoupling the first node from the second power supply when in an unprogrammed state;

assigning a determined state to the first node when exactly one of the first and second anti-fuses is in the programmed state; and

basing the state of the programmed signal is based on the state of the first node.

9. The method of claim 8, wherein selectively coupling a first node to a first power supply by a first anti-fuse integrated circuit includes holding the first power supply at approximately Vcc.

10. The method of claim 8, wherein selectively coupling a first node to a first power supply by a first anti-fuse integrated circuit includes holding the first power supply at approximately Vcc/2.

11. The method of claim 8, wherein selectively coupling the first node to a second power supply by a second anti-fuse includes holding the second power supply at a ground potential.

12. A method for providing a programmed signal in an integrated circuit, comprising:

coupling a first terminal of a first anti-fuse to a first node;

coupling a second terminal of the first anti-fuse to a first power supply via a first switch during a normal operation;

coupling a first terminal of the second anti-fuse to the first node;

coupling a second terminal of the second anti-fuse to a second power supply via a second switch during a normal operation;

carrying sufficient voltage on a first bus to short the first anti-fuse;

carrying sufficient voltage on a second bus to short the second anti-fuse;

during a first programming operation, operating the first switch to connect the first anti-fuse to the first bus for programming the first anti-fuse to electrically couple the second terminal of the first anti-fuse to the first power supply and providing a programming signal that connects the first node to ground;

during a second programming operation, operating the second switch to connect the second anti-fuse to the second bus for programming the second anti-fuse to electrically couple the second terminal of the second anti-fuse to the second power supply and providing a programming signal that connects the first node to ground; and

providing an enable signal that selectively connects the first node to ground.

13. The method of claim 12, wherein operating the first switch includes sending a signal to a gate of a transistor to operate the switch.

14. The method of claim 12, wherein coupling the second anti-fuse to the second power supply includes holding the second power supply at a ground potential.

15. The method of claim 12, wherein only one of the first programming operation and the second programming operation can be performed such that only one of the first anti-fuse and the second anti-fuse can be programmed.

16. The method of claim 15, wherein performing only one of the first programming operation and the second programming operation includes substantially eliminating standby current between the first power supply and the second power supply.

17. The method of claim 12, wherein coupling the second anti-fuse to the second power supply includes holding thee second power supply at a ground potential and coupling the first anti-fuse to the first power supply includes holding the first power supply at one of Vcc or DVC2.

18. The method of claim 17, wherein only one of the first programming operation and the second programming operation can be performed such that only one of the first anti-fuse and the second anti-fuse can be programmed and no resistive short is established between the one of Vcc or DVC2 and the ground potential.

19. The method of claim 12, wherein no long-L p-channel pull-up transistor is interposed between the first power supply and either anti-fuse and wherein no long-L p-channel pull-up transistor is interposed between the second power supply and either anti-fuse.

20. A method of programming an integrated circuit, comprising:

providing an enable signal having a non-enable state and an enable state;

providing a programming signal having a programming state and a non-programming state;

programming exactly one anti-fuse of a first anti-fuse and a second anti-fuse interposed between a first power supply and a second power supply based on the programming signal being in the programming state, thereby substantially eliminating standby current between the first power supply and the second power supply;

providing a programmed signal from the programmable circuit, wherein the programmed signal has a first potential from the first power supply in response to the enable signal being in the enable state, the first anti-fuse being programmed and the second anti-fuse being unprogrammed, and the programmed signal has a second potential from the second power supply in response to the enable signal being in the enable state, the second anti-fuse being programmed and the first anti-fuse being unprogrammed;

wherein the programmed signal assumes a determined potential when exactly one of the first anti-fuse and the second anti-fuse is programmed; and

selectively coupling a first node connected to both the first anti-fuse and the second anti-fuse to the second power supply regardless of the state of the first and second anti-fuses with the enable signal being in the non-enable state.

21. The method of claim 20, further comprising holding the first power supply at approximately Vcc.

22. The method of claim 20, further comprising holding the first power supply at approximately Vcc/2.

23. The method of claim 20, further comprising holding the second power supply at a ground potential.

24. The method of claim 20, wherein no long-L p-channel pull-up transistor is interposed between the first node and either the first or the second power supply.

25. A method of programming an integrated circuit, comprising:

providing an enable signal having a non-enable state and an enable state;

providing a programming signal having a programming state and a non-programming state;

programming exactly one anti-fuse of a first anti-fuse and a second anti-fuse interposed between a first power supply and a second power supply based on the programming signal being in the programming state, wherein no long-L p-channel pull-up transistor is interposed between the first power supply and either anti-fuse and wherein no long-L p-channel pull-up transistor is interposed between the second power supply and either anti-fuse;

providing a programmed signal from the programmable circuit, wherein the programmed signal has a first potential from the first power supply in response to the enable signal being in the enable state, the first anti-fuse being programmed and the second anti-fuse being unprogrammed, and the programmed signal has a second potential from the second power supply in response to the enable signal being in the enable state, the second anti-fuse being programmed and the first anti-fuse being unprogrammed;

wherein the programmed signal assumes a determined potential when exactly one of the first anti-fuse and the second anti-fuse is programmed; and

selectively coupling a first node connected to both the first anti-fuse and the second anti-fuse to the second power supply regardless of the state of the first and second anti-fuses with the enable signal being in the non-enable state.

26. The method of claim 25, further comprising holding the first power supply at approximately Vcc.

27. The method of claim 25, further comprising holding the first power supply at approximately Vcc/2.

28. The method of claim 25, further comprising holding the second power supply at a ground potential.

29. The method of claim 25, wherein no long-L p-channel pull-up transistor is interposed between the first node and, either the first or the second power supply.