Implantable cardiac stimulation device having reduced shelf current consumption and method

• US 6,687,543 B1
• Filed: 06/06/2001
• Issued: 02/03/2004
• Est. Priority Date: 06/06/2001
• Status: Active Grant

• Current Assignee: Pacesetter Incorporated (Abbott Laboratories Incorporated)
• Original Assignee: Pacesetter Incorporated (Abbott Laboratories Incorporated)
• Inventors: Isaac, George I., Vogel, Alan B.
• Primary Examiner(s): Schaetzle, Kennedy
• Application Number:
  US09/876,725
• Time in Patent Office: 972 Days
• Field of Search: 607/2, 607/16, 607/30, 607/34, 607/60
• US Class Current: 607/16
• CPC Class Codes: A61N 1/3956 Implantable devices for applying electric shocks to the heart, e.g. for cardioversion

Abstract

A processor controlled implantable cardiac stimulation device may be placed into a shelf mode for extending the shelf life of the device. The device includes a real time clock circuit, a watch dog timer circuit having a duty cycle, a telemetry circuit capable of operation in either an active mode or a standby mode, and ancillary circuits that sense cardiac activity and provides stimulation pulses to a heart. The device includes a power source for providing power to all of the circuits of the device and a shelf mode circuit that places the device into the shelf mode. The shelf mode circuit disables power to the ancillary circuits, decreases the duty cycle of the watch dog timer, sets the processor into a static state, and sets the telemetry circuit to the standby mode. The shelf mode circuit places the device into the shelf mode in response to shelf mode commands received by the telemetry circuit to set the device from an active powered mode to the shelf mode.

Claims

1. A processor controlled implantable cardiac stimulation device having a processor, a real-time clock circuit, a watch dog timer circuit having a duty cycle, a telemetry circuit capable of operation in either an active mode or a standby mode, and ancillary circuits that sense cardiac activity and provide stimulation pulses to a heart, the device comprising:

a power source for providing power to all of the circuits of the device; and

a shelf mode circuit that disables power to the ancillary circuits, decreases the duty cycle of the watch dog timer, sets the processor into a static state, and sets the telemetry circuit to the standby mode in response to shelf mode commands received by the telemetry circuit to set the device from an active powered mode to a shelf mode and reduce shelf current consumed by the device;

wherein the watch dog timer remains operational at a reduced rate to detect processor errors during the shelf mode; and

wherein a transmitting circuit of the telemetry circuit is disabled during the shelf mode and a receiving circuit of the telemetry circuit remains active during the shelf mode.

2. The device of claim 1 further including a decoder circuit that enables the shelf mode circuit upon receiving from the telemetry circuit a plurality of predetermined serial commands.

3. The device of claim 2 wherein the decoder circuit enables the shelf mode circuit when each of the serial commands is received within a preset time.

4. The device of claim 1 wherein the device is an implantable defibrillator having a plurality of capacitors requiring periodic reforming and wherein the device includes a reform circuit that periodically charges the capacitors.

5. The device of claim 1 wherein the shelf mode circuit returns the device to the active powered mode in response to a reset command received by the telemetry circuit.

6. The device of claim 1 wherein the shelf current consumed by the device when the device is in the shelf mode is on the order of one microampere.

7. A processor controlled implantable cardiac stimulation device having a processor, a real-time clock circuit, a watch dog timer circuit having a duty cycle, a telemetry circuit capable of operation in either an active mode or a standby mode, and ancillary circuits that sense cardiac activity and provide stimulation pulses to a heart, the device comprising:

a power source for providing power to all of the circuits of the device; and

a shelf mode circuit that disables power to the ancillary circuits, decreases the duty cycle of the watch dog timer, sets the processor into a static state, and sets the telemetry circuit to the standby mode in response to shelf mode commands received by the telemetry circuit to set the device from an active powered mode to a shelf mode and reduce shelf current consumed by the device;

wherein the device is an implantable defibrillator having a plurality of capacitors requiring periodic reforming and wherein the device includes a reform circuit that periodically charges the capacitors; and

wherein the reform circuit causes the shelf mode circuit to return the device to the active powered mode prior to reforming the capacitors and causes the shelf mode circuit to reassert the shelf mode after charging the capacitors.

8. An implantable cardiac stimulation device including processing means for controlling operation of the device, real-time clock means for providing clock signals to the processing means, watch dog timer means operable at a duty cycle rate for detecting malfunction of the processing means, telemetry means for receiving external commands when in an active state and wake-up commands when in a standby state, therapy means for sensing cardiac activity and providing stimulation pulses to a heart, and depletable power supply means for supplying power to the processing means, the real-time clock means, the watch dog timer means, the telemetry means and the therapy means, an arrangement for placing the device into a shelf mode from a fully activated powered mode and reducing shelf current consumed by the device, the arrangement comprising shelf mode establishing means for disabling supply of power to the therapy means, decreasing the duty cycle of the watch dog timer means, setting the processor into a static state, and setting the telemetry means to the standby state responsive to shelf mode commands received by the telemetry means for placing the device into the shelf mode;

wherein the watch dog timer means remains operational at the reduced duty cycle to detect processor errors during the shelf mode; and

wherein a transmitting circuit of the telemetry means is disabled during the standby state and a receiving circuit of the telemetry circuit remains active during the standby state.

9. The device of claim 8 further including decoder means for enabling the shelf mode establishing means responsive to the telemetry means receiving plurality of predetermined serial commands.

10. The device of claim 9 wherein the decoder means enables the shelf mode establishing means responsive to each of the serial commands being received by the telemetry means within a preset time.

11. The device of claim 8 wherein the device is an implantable defibrillator having a plurality of capacitors requiring periodic reforming and wherein the arrangement includes reform means for periodically charging the capacitors.

12. The device of claim 8 wherein the shelf mode establishing means returns the device to the fully active powered mode responsive to a reset command being received by the telemetry means.

13. The device of claim 8 wherein the shelf current consumed by the device when the device is in the shelf mode is on the order of one microampere.

14. An implantable cardiac stimulation device including processing means for controlling operation of the device, real-time clock means for providing clock signals to the processing means, watch dog timer means operable at a duty cycle rate for detecting malfunction of the processing means, telemetry means for receiving external commands when in an active state and wake-up commands when in a standby state, therapy means for sensing cardiac activity and providing stimulation pulses to a heart, and depletable power supply means for supplying power to the processing means, the real-time clock means, the watch dog timer means, the telemetry means and the therapy means, an arrangement for placing the device into a shelf mode from a fully activated powered mode and reducing shelf current consumed by the device, the arrangement comprising shelf mode establishing means for disabling supply of power to the therapy means, decreasing the duty cycle of the watch dog timer means, setting the processor into a static state, and setting the telemetry means to the standby state responsive to shelf mode commands received by the telemetry means for placing the device into the shelf mode;

wherein the device is an implantable defibrillator having a plurality of capacitors requiring periodic reforming and wherein the arrangement includes reform means for periodically charging the capacitors; and

wherein the reform means causes the shelf mode establishing means to return the device to the fully active powered mode prior to reforming the capacitors and causes the shelf mode establishing means to reassert the shelf mode after charging the capacitors.

15. In a processor controlled implantable cardiac stimulation device having a real-time clock circuit, a watch dog timer circuit having a duty cycle, a telemetry circuit capable of operation in either an active mode or a standby mode, ancillary circuits that sense cardiac activity and provide stimulation pulses to a heart, and a power source that provides power to all of the circuits, a method of setting the device from an active powered mode to a shelf mode for reducing shelf current consumed by the device, the method including the steps of:

receiving a shelf mode command signal with the telemetry circuit; and

responsive to receiving the shelf mode command signal, placing the device into the shelf mode by disabling power to the ancillary circuits, decreasing the duty cycle of the watch dog timer, setting the processor into a static state and setting the telemetry circuit in the standby mode;

wherein the watch dog timer remains operational at the decreased duty cycle to detect processor errors during the shelf mode; and

wherein a transmitting circuit of the telemetry circuit is disabled during the standby mode and a receiving circuit of the telemetry circuit remains active during the standby mode.

16. The method of claim 15 wherein the placing step is performed responsive to the telemetry circuit receiving a plurality of predetermined serial commands comprising the shelf mode command signal.

17. The method of claim 16 wherein the placing step is performed responsive to each of the serial commands being received by the telemetry circuit within a preset time.

18. The method of claim 15 wherein the device is an implantable defibrillator having a plurality of capacitors requiring periodic reforming and wherein the method further includes the step of charging the capacitors at periodic intervals.

19. The method of claim 15 including the further step of receiving a reset command with the telemetry circuit and returning the device to the fully active powered mode responsive to receiving the reset command with the telemetry circuit.

20. In a processor controlled implantable cardiac stimulation device having a real-time clock circuit, a watch dog timer circuit having a duly cycle, a telemetry circuit capable of operation in either an active mode or a standby mode, ancillary circuits that sense cardiac activity and provide stimulation pulses to a heart, and a power source that provides power to all of the circuits, a method of setting the device from an active powered mode to a shelf mode for reducing shelf current consumed by the device, the method including the steps of:

receiving a shelf mode command signal with the telemetry circuit; and

responsive to receiving the shelf mode command signal, placing the device into the shelf mode by disabling power to the ancillary circuits, decreasing the duty cycle of the watch dog timer, setting the processor into static state and setting the telemetry circuit in the standby mode;

wherein the device is an implantable defibrillator having a plurality of capacitors requiring periodic reforming and wherein the method further includes the step of charging the capacitors at periodic intervals; and

wherein the reforming step includes the steps of returning the device to the active powered mode prior to reforming the capacitors and replacing the device in the shelf mode after charging the capacitors.