Method and apparatus for performing extraction using a model trained with Bayesian inference using a hybrid monte carlo method
First Claim
1. A method of extracting electrical characteristics from an integrated circuit layout, said method comprising:
- dividing said integrated circuit layout into at least one extraction sub problem;
identifying a set of physical parameters that define said extraction sub problem from said integrated circuit layout;
supplying said set of physical parameters to a machine-learning model trained with Bayesian inference implemented with a Hybrid Monte Carlo method; and
calculating at least one electrical characteristic for said extraction sub problem by analyzing said set of physical parameters with said machine-learning model trained with Bayesian inference implemented with a Hybrid Monte Carlo method.
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Abstract
A system for using machine learning based upon Bayesian inference using a hybrid monte carlo method to create a model for performing integrated circuit layout extraction is disclosed. The system of the present invention has two main phases: model creation and model application. The model creation phase comprises creating one or more extraction models using machine-learning techniques. First, a complex extraction problem is decomposed into smaller simpler extraction problems. Then, each smaller extraction problem is then analyzed to identify a set of physical parameters that fully define the smaller extraction problem. Next, complex mathematical models are created using machine learning techniques for all of the smaller simpler extraction problems. The machine learning is performed by first creating training data sets composed of the identified parameters from typical examples of the smaller extraction problem and the answers to those example extraction problems as solved using a highly accurate physics-based field solver. The system uses Bayesian inference implemented with a hybrid Monte Carlo method to train a set of neural networks for extraction problems. After the creation of a set of models for each of the smaller simpler extraction problems, the machine-learning based models may be used for extraction.
50 Citations
20 Claims
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1. A method of extracting electrical characteristics from an integrated circuit layout, said method comprising:
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dividing said integrated circuit layout into at least one extraction sub problem;
identifying a set of physical parameters that define said extraction sub problem from said integrated circuit layout;
supplying said set of physical parameters to a machine-learning model trained with Bayesian inference implemented with a Hybrid Monte Carlo method; and
calculating at least one electrical characteristic for said extraction sub problem by analyzing said set of physical parameters with said machine-learning model trained with Bayesian inference implemented with a Hybrid Monte Carlo method. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
selecting said machine-learning model from a plurality of machine-learning models.
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10. The method as claimed in claim 1 wherein calculating at least one electrical characteristic for said extraction sub problem comprises:
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determining a capacitance per unit length for a subsection of interconnect wiring; and
multiplying said capacitance per unit length by a length of said subsection of interconnect wiring.
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11. A computer readable medium, said computer readable medium comprising an arranged set of computer instructions for:
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dividing an integrated circuit layout into at least one extraction sub problem;
identifying a set of physical parameters that define said extraction sub problem from said integrated circuit layout;
supplying said set of physical parameters to a machine-learning model trained with Bayesian inference implemented with a Hybrid Monte Carlo method; and
calculating at least one electrical characteristic for said extraction sub problem by analyzing said set of physical parameters with said machine-learning model trained with Bayesian inference implemented with a Hybrid Monte Carlo method. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20)
selecting said extraction sub problem model from a plurality of extraction sub problem models.
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20. The computer readable medium as claimed in claim 11 wherein a subset of computer instructions for calculating at least one electrical characteristic for said extraction sub problem perform the follow:
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determining a capacitance per unit length for a subsection of interconnect wiring; and
multiplying said capacitance per unit length by a length of said subsection of interconnect wiring.
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Specification
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- Resources
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Current AssigneeCadence Design Solutions, Inc.
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Original AssigneeCadence Design Systems Incorporated (Cadence Group)
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InventorsChatterjee, Arindam, Teig, Steven
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Primary Examiner(s)Garbowski, Leigh M.
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Assistant Examiner(s)Bowers, Brandon
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Application NumberUS10/061,437Time in Patent Office733 DaysField of Search716/4, 716/5, 716/6, 716/1US Class Current716/115CPC Class CodesG06F 2111/06 Multi-objective optimisatio...G06F 30/367 Design verification, e.g. u...
