Method and apparatus for executing instructions loaded into a reserved portion of system memory for transitioning a computer system from a first power state to a second power state

• US 6,691,234 B1
• Filed: 06/16/2000
• Issued: 02/10/2004
• Est. Priority Date: 06/16/2000
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Huff, Robert L.
• Primary Examiner(s): Lee, Thomas
• Assistant Examiner(s): CONNOLLY, MARK A
• Application Number:
  US09/595,805
• Time in Patent Office: 1,334 Days
• Field of Search: 713/1, 713/300, 713/340, 711/100, 711/103, 711/170, 711/173, 711/202
• US Class Current: 713/300
• CPC Class Codes: G06F 9/4418 Suspend and resume; Hibernate and awake

Abstract

According to one aspect of the present invention, a method is provided in which a portion of system memory is reserved during a system boot operation for storing a set of instructions to be executed to transition a computer system from a first power state to a second power state. The reserved portion is made unavailable for use by an operating system of the computer system. The set of instructions stored in the reserved portion is executed to transition the computer system from the first power state to the second power state in response to a wakeup event.

Claims

1. A method comprising:

reserving a portion of system memory during a system boot operation for storing a set of instructions to be executed to transition a computer system from a first power state to a second power state;

making the reserved portion unavailable for use by an operating system of the computer system;

executing the set of instructions stored in the reserved portion to transition the computer system from the first power state to the second power state in response to a wakeup event; and

in response to the wakeup event, loading the set of instructions from a flash memory into the reserved portion of system memory.

2. The method of claim 1 wherein the system is compatible with the Advanced Configuration and Power Interface (ACPI) specification.

3. The method of claim 2 wherein the first power state is ACPI S3 sleeping state and the second power state is a higher power state than the ACPI S3 sleeping state.

4. The method of claim 1 wherein reserving comprises:

configuring the system memory during the system boot operation including allocating a predetermined portion of the system memory for storing the set of instructions.

5. The method of claim 4 wherein configuring comprises:

configuring a basic input/output system (BIOS) program to set aside the predetermined portion of the system'"'"'s memory during the system boot operation; and

configuring the BIOS program to indicate that the memory available for use by an operating system does not include the reserved portion.

6. The method of claim 5 wherein making the reserved portion unavailable comprises:

in response to the operating system'"'"'s request for the system memory configuration information, reporting that a system memory area available for use by the operating system does not include the reserved portion.

7. The method of claim 5 wherein configuring the BIOS program to indicate that the reserved portion is not available for use by the operating system comprises:

maintaining a system memory configuration map that includes information about the size and the location of a system memory area that is available for use by the operating system.

8. The method of claim 1 wherein the size of the reserved portion is determined based on the size of the set of instructions.

9. A method as recited in claim 1, wherein the set of instructions is resume code, the resume code being developed in a high level language, allowing portability to a new architecture.

10. A method as recited in claim 9, wherein the resume code is modular.

11. A method as recited in claim 9, wherein the resume code utilizes stack management.

12. A basic input/output system (BIOS) in a computer system comprising:

logic to reserve a portion of a system memory during a system boot process for storing a set of instructions to be executed to transition the computer system from a first power state to a second power state;

logic to make the reserved portion unavailable for use by an operating system of the computer system;

logic to execute the set of instructions to transition the computer system from the first power state to the second power state; and

logic to load the set of instructions from a flash memory into the reserved portion of system memory in response to a wakeup event.

13. The BIOS of claim 12 wherein logic to reserve comprises:

logic to configure the system memory during the system boot process to designate a predetermined portion of the system memory to be used for storing the set of instructions.

14. The BIOS of claim 12 wherein logic to make the reserved portion unavailable comprises:

logic to maintain system memory configuration information which indicates that an area of system memory that is available for use by the operating system does not include the reserved portion.

15. The BIOS of claim 12 wherein the computer system is compatible with the Advanced Configuration and Power Interface (ACPI) specification.

16. The BIOS of claim 15 wherein the first power state is ACPI S3 sleeping state and the second power state is a higher power state than the ACPI S3 sleeping state.

17. A basic input/output system (BIOS) in a computer system as recited in claim 12, wherein the set of instructions is resume code, the resume code being developed in a high level language, allowing portability to a new architecture.

18. A basic input/output system (BIOS) in a computer system as recited in claim 17, wherein the resume code is modular.

19. A basic input/output system (BIOS) in a computer system as recited in claim 17, wherein the resume code utilizes stack management.

20. A computer system comprising:

a processor;

a system memory coupled to the processor;

an operating system; and

a BIOS program comprising;

logic to reserve a portion of the system memory during a system boot process for use by the BIOS;

logic to make the reserved portion unavailable for use by the operating system;

logic to utilize the reserved portion for executing a set of instructions to transition the system from a first power state to a second power state; and

logic to load the set of instructions from a flash memory into the reserved portion in response to a wakeup event.

21. The computer system of claim 20 wherein the computer system is compatible with the Advanced Configuration and Power Interface (ACPI) specification.

22. The computer system of claim 20 wherein the first power state is ACPI S3 sleeping state and the second power state is a higher power state than the ACPI S3 sleeping state.

23. A computer system as recited in claim 20, wherein the set of instructions to transition the system from a first power state to a second power state is resume code, the resume code being developed in a high level language, allowing portability to a new architecture.

24. A computer system as recited in claim 23, wherein the resume code is modular.

25. A computer system as recited in claim 23, wherein the resume code utilizes stack management.

26. A machine-readable medium which, when executed by a machine, causes the machine to perform operations comprising:

reserving a portion of system memory during a system boot operation for storing a set of instructions to be executed to transition a computer system from a first power state to a second power state, wherein the set of instructions is loaded from a flash memory into the reserved portion in response to a wakeup event;

making the reserved portion unavailable for use by an operating system of the computer system; and

executing the set of instructions stored in the reserved portion to transition the computer system from the first power state to the second power state in response to a wakeup event.

27. The machine-readable medium of claim 26 wherein the computer system is compatible with the Advanced Configuration and Power Interface (ACPI) specification.

28. The machine-readable medium of claim 27 wherein the first power state is ACPI S3 sleeping state and the second power state is a higher power state than the ACPI S3 sleeping state.

29. A machine-readable medium as recited in claim 26, wherein the set of instructions to be executed to transition a computer system from a first power state to a second power state is resume code, the resume code being developed in a high level language, allowing quick portability to a new architecture.

30. A machine-readable medium as recited in claim 29, wherein the resume code is modular.

31. A machine-readable medium as recited in claim 29, wherein the resume code utilizes stack management.