Graphics processor with pipeline state storage and retrieval

• US 6,693,639 B2
• Filed: 11/07/2002
• Issued: 02/17/2004
• Est. Priority Date: 08/20/1998
• Status: Expired due to Term

• Current Assignee: Apple Inc.
• Original Assignee: Apple Computer Incorporated (Apple Inc.)
• Inventors: Duluk, Jerome F. Jr., Go, Shun Wai, Hessel, Richard E., Benkual, Jack, Trivedi, Sushma S., Bratt, Joseph P.
• Primary Examiner(s): Bella, Matthew C.
• Assistant Examiner(s): Monestime, Mackly
• Application Number:
  US10/290,414
• Publication Number:
  US 20030067468A1
• Time in Patent Office: 467 Days
• Field of Search: 345/501, 345/502, 345/503, 345/504, 345/505, 345/506, 345/419, 345/427, 345/581
• US Class Current: 345/506
• CPC Class Codes: G06T 1/60 Memory management
• CPC Class Codes: G06T 11/001 Texturing; Colouring; Generation of texture or colour inpainting G06T5/77
• CPC Class Codes: G06T 11/40 Filling a planar surface by adding surface attributes, e.g. colour or texture
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 15/04 Texture mapping
• CPC Class Codes: G06T 15/20 Perspective computation
• CPC Class Codes: G06T 15/30 Clipping
• CPC Class Codes: G06T 15/40 Hidden part removal
• CPC Class Codes: G06T 15/50 Lighting effects
• CPC Class Codes: G06T 15/80 Shading
• CPC Class Codes: G06T 15/83 Phong shading
• CPC Class Codes: G06T 15/87 Gouraud shading

Abstract

A deferred graphics pipeline processor comprised of a mode extraction unit and a Polygon Memory associated with the polygon unit. The mode extraction unit receives a data stream from a geometry unit and separates the data stream into vertices data, and non-vertices data which is sent to the Polygon Memory for storage. A a mode injection unit receives inputs from the Polygon Memory and communicates the mode information to one or more other processing units. The mode injection unit maintains status information identifying the information that is already cached and not sending information that is already cached, thereby reducing communication bandwidth.

Claims

1. A deferred graphics pipeline processor comprising:

a mode extraction unit configured to receive a data stream and separate said data stream into vertices data and non-vertices data including color data;

a polygon memory operatively associated with said extraction unit to store said non-vertices data;

a mode injection unit receiving inputs from said polygon memory;

a processing unit configured to receive said color data from said mode injection unit, said processing unit associated with a cache;

said cache configured to store at least some previously received color data, said mode injection unit being operatively associated with said cache and maintaining status information identifying said stored data and not transmitting said stored data, thereby reducing communication bandwidth.

2. A 3D graphics pipeline for generating a rendered image from a plurality of graphics primitives, said pipeline comprising:

a mode extraction unit extracting and storing pipeline state information including color data from data flowing through said pipeline and associating said stored pipeline state information with said graphics primitives;

a processing unit configured to perform an operation on at least one of said graphics primitives, said processing unit operatively associated with a cache for caching at least some received pipeline state information; and

a mode injection unit configured to retrieve first stored pipeline state information associated with a first primitive, based on a determination that said first stored pipeline state information is not cached, and injecting said first stored pipeline state information into the data flowing through the pipeline.

3. The 3D graphics pipeline of claim 2, the pipeline further comprising:

a plurality of tag memories storing a unique identifier for each piece of pipeline state information that is cached; and

a plurality of data caches storing each piece of pipeline state information that is cached.

4. The 3D graphics pipeline of claim 3, the pipeline further comprising:

logic inputting the unique identifiers into one or more tag memories to determine which pieces of pipeline state information are missing from the data caches; and

logic retrieving the missing pipeline state information and sending the retrieved pipeline state information down the pipeline ahead of associated graphics primitives for storage into the data caches, thereby guaranteeing needed state information is residing in the data caches at the time it is needed.

5. A computing system for 3-D graphics rendering, generating a final rendered image, comprising:

a general-purpose computer having a processor; and

a 3-D graphics processor coupled to said processor and comprising;

(1) a mode extraction unit extracting and storing pipeline state information including color data from data flowing through the pipeline and associating the stored pipeline state information with the graphics primitives;

(2) a processing unit configured to perform an operation on at least one of the graphics primitives, said processing unit operatively associated with a cache for caching received pipeline state information; and

(3) a mode injection unit configured to retrieve first stored pipeline state information associated with a first primitive, based on a determination that said first information is not cached, and injecting the retrieved pipeline state information into the data flowing through the pipeline.

6. The system of claim 5, said processor further comprising:

a plurality of tag memories storing a unique identifier for each piece of pipeline state information that is cached;

a plurality of data caches storing each piece of pipeline state information that is cached;

logic inputting the unique identifiers into one or more tag memories to determine which pieces of pipeline state information are missing from the data caches; and

logic retrieving the missing pipeline state information and sending the retrieved pipeline state information down the pipeline ahead of associated graphics primitives for storage into the data caches, thereby guaranteeing needed state information is residing in the data caches at the time it is needed.

7. A method for generating a rendered image from a plurality of graphics primitives, the method comprising:

maintaining current pipeline state information, the current pipeline state information divided into a plurality of state partitions;

indicating one or more changed state partitions, the changed state partitions being one or more of the state partitions in which the current pipeline state information has changed;

storing a multiplicity of the changed state partitions;

generating associations between the graphics primitives and corresponding stored state partitions;

determining when one or more of the stored changed state partitions is needed to process one of the graphics primitives; and

retrieving one or more of the stored changed state partitions by using the generated associations.

8. The method of claim 7, further comprising:

storing spatial data of the primitives;

storing non-spatial data of the primitives; and

generating associations between the spatial data of the primitives and the non-spatial data of the primitives.

9. The method of claim 8, further comprising:

spatially sorting the primitives according to a set of tiles within the image, the tiles being regions within the image; and

generating a list for each of the tiles of the stored primitives that overlap the tiles.

10. The method of claim 7, further comprising:

receiving a data packet of variable width, the packet updating part of the current pipeline state information.

11. The method of claim 7, further comprising:

maintaining at least some of the plurality of state partitions in front-back pairs in which only one partition in each pair is relevant for a particular one of the primitives; and

generating associations between each of the graphics primitives and precisely one of the two state partitions in each of the front-back pairs of state partitions.

12. The method of claim 7, further comprising:

receiving labels attached to corresponding state partitions, the labels used to refer to a plurality of labeled state partitions so as to reduce the amount of data fed into the pipeline.

13. The method of claim 7, wherein the current pipeline state information further comprises instructions that are executed to perform lighting computations.

14. The method of claim 7, further comprising:

maintaining a plurality of dirty flags, each of the dirty flags corresponding to one of the state partitions, each dirty flag indicating whether the corresponding state partition has changed since the last time the corresponding state partition was stored.

15. The method of claim 7, further comprising:

comparing at least some of an incoming pipeline state information to at least some of the current pipeline state information.

16. The method of claim 7, further comprising:

generating a set of pointers, each of the pointers used for locating one of the state partitions, at least some of the set of pointers being shared amongst a plurality of the primitives.

17. The method of claim 7, further comprising:

storing pieces of the pipeline state information in the retrieved state partitions in a plurality of data cache memories so that the number of times state partitions are retrieved from storage is reduced as compared to a pipeline not storing pieces of the pipeline state information in the retrieved state partitions.

18. The method of claim 17, further comprising:

storing a unique identifier in one or more of a plurality of tag memories, one of the unique identifiers for each of the pieces of pipeline state information that are cached In one of the data cache memories; and

inputting the unique identifiers into one or more of the tag memories to determine which pieces of the pipeline state information are missing from the data caches.

19. The method of claim 8, further comprising:

generating a set of pointers for each primitive, each of the sets of pointers used for locating the non-spatial data of the primitives, the set of pointers comprising an address and an offset.

20. The method of claim 7, further comprising:

performing hidden surface removal to cull out parts of the primitives that definitely do not contribute to the final rendered image.

21. The method of claim 7, further comprising:

operating on a selected one of the primitives and providing a clipping guard band, the clipping guard band being an additional area around the image, the operating on the selected one of the primitives comprising;

(a) not clipping and not discarding the selected primitive if the selected primitive is completely within the bounds of the clipping guard band;

(b) discarding the selected primitive if the selected primitive is completely outside the image; and

(c) clipping the selected primitive if the selected primitive is not completely within the bounds of the clipping guardband and not completely outside the image.

22. A deferred graphics pipeline processor comprising:

a first unit configured to receive a data stream and separate said data stream into at least vertices data and color data;

a memory operatively associated with said first unit to store said color data;

a second unit receiving inputs from said memory;

a processing unit configured to receive said color data from said first unit, said processing unit associated with a cache;

said cache configured to store at least some previously received color data, said second unit being operatively associated with said cache and maintaining status information identifying said stored color data and not transmitting said stored color data.

23. A 3D graphics pipeline for generating a rendered image from a plurality of graphics primitives, said pipeline comprising:

a first unit extracting and storing pipeline state information including color data from data flowing through said pipeline and associating at least some of said stored color data with said graphics primitives;

a processing unit configured to perform an operation on at least one of said graphics primitives, said processing unit operatively associated with a cache for caching at least some received pipeline state information; and

a second unit configured to retrieve first stored pipeline state Information associated with a first primitive, and injecting said first stored pipeline state information into data flowing through the pipeline.

24. A computing system for 3-D graphics rendering, generating a final rendered image, comprising:

a graphics processor coupled to a first external processor and comprising;

(1) a first unit extracting and storing pipeline state information including color data from data flowing through the pipeline and associating the stored pipeline state information with the graphics primitives;

(2) a processing unit configured to perform an operatIon on at least one of the graphics primitives, said processing unit operatively associated with a cache for caching received pipeline state information; and

(3) a second unit configured to retrieve first stored pipeline state information associated with a first primitive, and injecting the retrieved pipeline state information into data flowing through the pipeline.

25. A method for generating a rendered image from a plurality of graphics primitives, the method comprising:

maintaining pipeline state information, the pipeline state information divided into a plurality of state partitions;

indicating one or more changed state partitions in which the current pipeline state information has changed;

storing the changed state partitions;

generating associations between the graphics primitives and stored state partitions;

determining when one or more of the stored changed state partitions is needed to process one of the graphics primitives; and

retrieving the needed stored changed state partitions using the generated associations.