Non-volatile semiconductor memory device with enhanced erase/write cycle endurance

• US 6,693,840 B2
• Filed: 10/15/2002
• Issued: 02/17/2004
• Est. Priority Date: 10/17/2001
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Shimada, Yasuhiro, Kato, Yoshihisa, Yamada, Takayoshi
• Primary Examiner(s): LE, VU ANH
• Application Number:
  US10/271,139
• Publication Number:
  US 20030095463A1
• Time in Patent Office: 490 Days
• Field of Search: 365/226, 365/227, 365/228, 365/149, 365/229
• US Class Current: 365/228
• CPC Class Codes: G11C 14/00 Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
• CPC Class Codes: G11C 16/30 Power supply circuits

Abstract

The power-supply unit, while directing externally supplied power to the control unit and the like, accumulates an amount of power that is required by the control unit to save data from the volatile memory to the non-volatile memory. When an external power supply has started, the control unit restores data of the non-volatile memory in the volatile memory; and when the external power supply has stopped, the control unit saves data from the volatile memory to the non-volatile memory.

Claims

1. A semiconductor memory device being included in one chip, comprising:

a volatile memory;

a non-volatile memory;

a volatile memory access unit operable to allow a device external to the chip to access the volatile memory;

a data save unit operable to save data from the volatile memory to the non-volatile memory; and

a power-supply unit operable to accumulate power therein, and supply the accumulated power to the data save unit for use in saving data,

wherein the volatile memory, the non-volatile memory, the volatile memory access unit, the data save unit, and the power-supply unit are integrated into the chip.

2. The semiconductor memory device of claim 1 further comprising

a condition-change detect unit operable to detect a change of a condition of a power supply to the chip from a source external to the chip,

wherein the data save unit saves the data from the volatile memory to the non-volatile memory when the condition-change detect unit detects a change from power-on to power-off.

3. The semiconductor memory device of claim 2 further comprising

a data restore unit operable to restore data having been stored in the non-volatile memory into the volatile memory when the condition-change detect unit detects a change from power-off to power-on.

4. The semiconductor memory device of claim 1 further comprising

an area-designation receive unit operable to receive a designation of a memory area in the non-volatile memory,

wherein the data save unit saves the data to the designated memory area.

5. The semiconductor memory device of claim 1 further comprising

a non-volatile memory access unit operable to allow a device external to the chip to read data from the non-volatile memory.

6. The semiconductor memory device of claim 1,

wherein the non-volatile memory is one of a flash memory and a ferroelectric RAM.

7. The semiconductor memory device of claim 1,

wherein the power-supply unit is one of a chargeable secondary battery, a capacitor, and a reactance element, and accumulates power supplied to the chip from a source external to the chip.