Fast acquisition module for a code division multiple access (CDMA) wireless local loop (WLL) system
First Claim
1. An acquisition module for acquiring signal timing in a CDMA system comprising:
- a register for storing and organizing synchronization code;
at least 4 match filters for match filtering between I/Q samples and the corresponding synchronization code;
at least 4 absolute value blocks for determining absolute values of match filtering results;
a summation function for summing results obtained through match filtering and through absolute value taking; and
a control logic for controlling the acquisition process;
characterized in that the acquisition module loads a 64-bit section of synchronization code and I/Q complex samples and match filters them in a simultaneous manner and, upon registering a value greater than a preset threshold, acquires an initial timing, the initial timing being verified over the remaining 64-bit sections of synchronization code using the same control circuitry used in acquiring the timing.
4 Assignments
0 Petitions
Accused Products
Abstract
An acquisition module for acquiring signal timing in a CDMA system has a register for storing and organizing synchronization code, at least 4 match filters for match filtering between I/Q samples and the corresponding synchronization code, at least 4 absolute value blocks for determining absolute values of match filtering results, a summation function for summing results obtained through match filtering and through absolute value taking, and a control logic for controlling the acquisition process, characterized in that the acquisition module loads a 64-bit section of synchronization code and I/Q complex samples and match filters them in a simultaneous manner and, upon registering a value greater than a preset threshold, acquires an initial timing, the initial timing being verified over the remaining 64-bit sections of synchronization code using the same control circuitry used in acquiring the timing.
-
Citations
9 Claims
-
1. An acquisition module for acquiring signal timing in a CDMA system comprising:
-
a register for storing and organizing synchronization code;
at least 4 match filters for match filtering between I/Q samples and the corresponding synchronization code;
at least 4 absolute value blocks for determining absolute values of match filtering results;
a summation function for summing results obtained through match filtering and through absolute value taking; and
a control logic for controlling the acquisition process;
characterized in that the acquisition module loads a 64-bit section of synchronization code and I/Q complex samples and match filters them in a simultaneous manner and, upon registering a value greater than a preset threshold, acquires an initial timing, the initial timing being verified over the remaining 64-bit sections of synchronization code using the same control circuitry used in acquiring the timing. - View Dependent Claims (2, 3, 4)
-
-
5. A method for acquiring signal timing for a CDMA system comprising the steps of:
-
a) loading a 64-bit section of synchronization code into an acquisition module;
b) receiving 64 bits of I/Q complex samples corresponding to the 64-bit section of synchronization code;
c) match filtering the synchronization code and the I/Q complex samples simultaneously using at least 4 16-bit match filters;
d) comparing match filtering results with a preset threshold; and
e) depending upon the comparison, determining whether a received signal timing is acceptable for acquisition and verification. - View Dependent Claims (6, 7, 8, 9)
-
Specification