Method for making a semiconductor device having a high-k gate dielectric

• US 6,696,327 B1
• Filed: 03/18/2003
• Issued: 02/24/2004
• Est. Priority Date: 03/18/2003
• Status: Active Grant

• Current Assignee: Tahoe Research Limited (f/k/a Learndale Limited) (Vector Capital Corporation)
• Original Assignee: Intel Corporation
• Inventors: Chau, Robert S., Doczy, Mark L., Brask, Justin K., Barnak, John P.
• Primary Examiner(s): Nguyen, Tuan H.
• Application Number:
  US10/391,816
• Time in Patent Office: 343 Days
• Field of Search: 438/287, 438/261, 438/216, 438/197, 438/591
• US Class Current: 438/197
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/823814 with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
• CPC Class Codes: H01L 21/823871 interconnection or wiring or contact manufacturing related aspects
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Abstract

A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, then forming a capping layer on the high-k gate dielectric layer. After oxidizing the capping layer to form a capping dielectric oxide on the high-k gate dielectric layer, a gate electrode is formed on the capping dielectric oxide.

Claims

1. A method for making a semiconductor device comprising:

forming on a substrate a high-k gate dielectric layer;

applying a wet chemical treatment to the high-k gate dielectric layer to remove impurities from that layer and to increase the oxygen content of that layer;

forming a capping layer that comprises silicon and that is less than about five monolayers thick on the high-k gate dielectric layer;

oxidizing the capping layer by exposing the capping layer to a solution that comprises hydrogen peroxide to form a capping dielectric oxide on the high-k gate dielectric layer; and

then

forming a gate electrode that comprises polysilicon on the capping dielectric oxide.

2. A method for making a semiconductor device comprising:

forming a high-k gate dielectric layer on a substrate, the high-k gate dielectric layer being less than about 60 angstroms thick and comprising a material selected from the group consisting of hafnium oxide, zirconium oxide, titanium oxide, and aluminum oxide;

applying a wet chemical treatment to the high-k gate dielectric layer to remove impurities from that layer and to increase the oxygen content of that layer;

forming on the high-k gate dielectric layer a silicon containing layer that is less than about five monolayers thick;

oxidizing the silicon containing layer to form a silicon dioxide layer on the high-k gate dielectric layer;

forming a layer that comprises polysilicon on the silicon dioxide layer; and

etching the polysilicon containing layer, the silicon dioxide layer and the high-k gate dielectric layer.