Digital measurement circuit and system using a grounded capacitive sensor

• US 6,700,392 B2
• Filed: 01/31/2002
• Issued: 03/02/2004
• Est. Priority Date: 02/02/2001
• Status: Expired due to Fees

• Current Assignee: Wayne C. Haase
• Original Assignee: Wayne C. Haase
• Inventors: Haase, Wayne C.
• Primary Examiner(s): Chapman, John E.
• Assistant Examiner(s): Kerveros, James
• Application Number:
  US10/062,677
• Publication Number:
  US 20020140440A1
• Time in Patent Office: 761 Days
• Field of Search: 324/674, 324/678, 324/681, 324/688, 324/677, 324/686, 324/663, 324/684
• US Class Current: 324/674
• CPC Class Codes: G01R 27/2605 Measuring capacitance capacitive sensors G01D5/24
• CPC Class Codes: H03K 17/955 using a capacitive detector

Abstract

A circuit and system for sensing and measuring the mutual capacitance between a sensor capacitor having one grounded lead and a target and providing a direct digital output of the measured capacitance is disclosed. The circuit and system includes a relaxation oscillator coupled to a sensor capacitor and a fixed resistor. The fixed resistor and the sensor capacitor in conjunction with the relaxation oscillator provide a time varying output signal that has a period that is proportional to the mutual capacitance of the sensor capacitor and a target and resistance of the fixed resistor. The circuit and system can also include circuitry to compensate for the input capacitance of one or more amplifiers used in the relaxation oscillator. The circuit and system can also include circuitry to effectively increase the resistance of the fixed resistor by a predetermined constant. This allows a smaller resistance value for the fixed resistor to be used with the concomitant reduction in the size of the fixed resistor, which reduces the parasitic capacitance of the fixed resistor. A guard electrode can be formed coaxially surrounding the fixed resistor and coupled to an input amplifier in the circuit to further reduce the parallel parasitic capacitance of the fixed resistor. An interval timer can be coupled to the output of the relaxation oscillator to provide an accurate measurement of the period of the output signal. This value, or the frequency of the output signal, may be used by a calculation module to accurately determine the value of the mutual capacitance and the value of the measured variable. In addition, the system may include predetermined calibration signals that are used as correction values.

Claims

1. A circuit for sensing the value of the mutual capacitance between a sensor capacitor and a target, the circuit comprising:

a sensing capacitor having a sensing capacitance value, the sensing capacitor having first and second terminals, the second terminal coupled to a voltage reference point;

a first amplifier having an input and an output, the input connected to the first terminal of the sensing capacitor, the amplifier providing an output signal that is proportional to the input signal;

an input capacitance compensation circuit coupled between the input and output of the first amplifier, the input capacitance compensation circuit operative to reduce the effect of the parasitic input capacitance of the first amplifier;

a relaxation oscillator coupled to the first amplifier and receiving the output signal therefrom, the relaxation oscillator including the sensing capacitor and the first amplifier, the relaxation oscillator having an output including first and second values, wherein the output of the relaxation oscillator is the first value for a first relaxation time and the output of the relaxation oscillator is the second value for a second relaxation time, and wherein the sum of the first relaxation time and the second relaxation time is proportional to the sensing capacitance value.

2. The circuit of claim 1, wherein the relaxation oscillator includes:

a Schmitt trigger having an input coupled to the output of the first amplifier and receiving the output signal therefrom as an input signal, the Schmitt trigger having first and second threshold values defining a hysteresis input to the Schmitt trigger, the Schmitt trigger configured and arranged to Switch an output signal between the first and second output values as a function of the input signal and the first and second threshold values, wherein the output is the first output level when the input exceeds the second threshold level, in a positive sense, and the output is the second output level when the input exceeds the first threshold level, in a negative sense, and wherein the Schmitt trigger maintains the previous output when the input is between the first and second thresholds;

a fixed resistor connected in series between the output of the Schmitt trigger and the first terminal of the sensing capacitor, wherein the first and second relaxation times are a function of the capacitance of the sensor capacitor and the resistance of the fixed resistor;

whereby the output signal of the Schmitt trigger has first and second values, wherein the output of the Schmitt trigger is the first value for the first relaxation time and the output of the Schmitt trigger is the second value for a second relaxation time, and wherein the sum of the first relaxation time and the second relaxation time is proportional to the first capacitance.

3. The circuit of claim 2 wherein the first amplifier includes an operational amplifier configured as a non-inverting unity gain amplifier.

4. The circuit of claim 2 wherein the Schmitt trigger includes a comparator having a positive input and a negative input and an output, wherein the input of the Schmitt trigger is the negative input, the Schmitt trigger further including a first resistor connected in series between the output and the positive input and a second resistor connected between the positive input and the voltage reference point, wherein the first and second resistors are selected to provide the first and second threshold values corresponding to the first and second output levels respectively.

5. The circuit of claim 2 further including a guard electrode coaxially surrounding the fixed resistor and proximate thereto, the guard being electrically coupled to the output of the first amplifier.

6. The circuit of claim 5 wherein the guard electrode further surrounds the input of the first amplifier.

7. The circuit of claim 1 wherein the first amplifier includes an operational amplifier and first and second resistors configured as a non-inverting amplifier in which the first and second resistors provide feedback form the output of the operational amplifier and the negative input, the non-inverting amplifier further including a feedback capacitor coupled between the output of the operational amplifier and the positive input.

8. A system for measuring the capacitance of a sensing capacitor, the system comprising:

a sensing capacitor having first and second terminals, the second terminal being connected to a voltage reference point, the sensing capacitor having a first capacitance;

a first amplifier having an input and an output, the input connected to the first terminal of the sensing capacitor, the amplifier providing an output signal that is proportional to the input signal;

an input capacitance compensation circuit coupled between the input and output of the first amplifier, the input capacitance compensation circuit operative to reduce the effect of the parasitic input capacitance of the first amplifier

a relaxation oscillator coupled to the output of the first amplifier, the relaxation oscillator having an output including first and second values, wherein the output of the relaxation oscillator is the first value for a first relaxation time and the output of the relaxation oscillator is the second value for a second relaxation time, and wherein the sum of the first relaxation time and the second relaxation time is proportional to the first capacitance;

a timing module coupled to the relaxation oscillator and configured and arranged to measure the first and second relaxation times and to provide a total relaxation time that is the sum of the first and second relaxation times;

a calculation module coupled to the timing module and configured and arranged to calculate the first capacitance by multiplying the total relaxation time by a predetermined constant.

9. The system of claim 8 wherein the relaxation oscillator includes:

a Schmitt trigger having an input coupled to the output of the first amplifier and receiving the output signal therefrom as an input signal, the Schmitt trigger having first and second threshold values, the Schmitt trigger configured and arranged to switch an output signal between first and second output values as a function of the input signal and the first and second threshold values, wherein the output is the first output level when the input exceeds the second threshold level and the output is the second output level when the input exceeds the first threshold level;

a fixed resistor connected in series between the output of the Schmitt trigger and the first terminal of the sensing capacitor;

wherein the output of the Schmitt trigger is the first value for the first relaxation time and the output of the Schmitt trigger is the second value for a second relaxation time, and wherein the sum of the first relaxation time and the second relaxation time is proportional to the first capacitance.

10. The system of claim 9 wherein the predetermined constant is a function of the first ad second values and the first and second threshold values.

11. The system of claim 9 wherein the Schmitt trigger includes a comparator having a positive input and a negative input and an output, wherein the input of the Schmitt trigger is the positive input, the Schmitt trigger further including a first resistor connected in series between the output and the negative input and a second resistor connected between the negative input and the voltage reference point, wherein the first and second resistors are selected to provide the first and second threshold values.

12. The system of claim 9 further including a guard electrode coaxially surrounding the fixed resistor and proximate thereto, the guard being electrically coupled to the output of the first amplifier.

13. The system of claim 12 wherein the guard electrode further surrounds the input of the first amplifier.

14. The system of claim 8 wherein the first amplifier includes an operational amplifier configured as a unity gain amplifier.

15. The system of claim 8 wherein the first amplifier includes an operational amplifier and first and second resistors configured as a non-inverting amplifier in which the first and second resistors provide feedback form the output of the operational amplifier and the negative input, the non-inverting amplifier further including a feedback capacitor coupled between the output of the operational amplifier and the positive input.

16. The system of claim 8 further including a calibration module coupled to the calculation module, the calibration module providing predetermined calibration signals to the calculation module for use as correction facto s.

17. A circuit for sensing the value of the mutual capacitance between a sensor capacitor and a tar et, the circuit comprising:

a sensing capacitor having a sensing capacitance value, the sensing capacitor having first and second terminals, the second terminal coupled to a voltage reference point;

a first amplifier having an input and an output, the input connected to the first terminal of the sensing capacitor, the amplifier providing an output signal that is proportional to the input signal;

a relaxation oscillator coupled to the first amplifier and receiving the output signal therefrom, the relaxation oscillator including the sensing capacitor and the first amplifier, the relaxation oscillator having an output including first and second values, wherein the output of the relaxation oscillator is the first value for a first relaxation time and the output of the relaxation oscillator is the second value for a second relaxation time, and wherein the sum of the first relaxation time and the second relaxation time is proportional to the sensing capacitance value;

a fixed resistor connected in series between the output of the relation oscillator and the first terminal of the sensing capacitors wherein the first and second relaxation times are a functions of the capacitance of the sensor capacitor and the resistance of the fixed resistor;

a resistance multiplying circuit coupled between the output of the relaxation oscillator, the output of the first amplifier and the fixed resistor, of the resistance multiplier circuit operative to multiply the value of the fixed resistor by a predetermined constant.

18. The circuit of claim 17 wherein the resistance multiplying circuit includes the first amplifier including an operational amplifier configured and arranged as a unity gain amplifier having an output and an input, the multiplying circuit further including first and second resistors coupled in series between the output of the relaxation oscillator and the output of the operational amplifier, the fixed resistor coupled to the series connection between the first and second resistors.

19. The circuit of claim 17 wherein the relaxation oscillator includes:

a Schmitt trigger having an input coupled to the output of the first amplifier and receiving the output signal therefrom as an input signal, the Schmitt trigger having first ad second threshold values defining a hysteresis input to the Schmitt trigger, the Schmitt trigger configured and arranged to switch an output signal between the first and second output values as a function of the input signal and the first and second threshold values, wherein the output is the first output level when the input exceeds the second threshold level, in a positive sense, and the output is the second output level when the input exceeds the first threshold level, in a negative sense, and wherein the Schmitt trigger maintains the previous output when the input is between the first and second thresholds;

wherein the fixed resistor is connected in series between the output of the Schmitt trigger and the first terminal of the sensing capacitor, wherein the first and second relaxation times are a function of the capacitance of the sensor capacitor and the resistance of the fixed resistor;

whereby the output signal of the Schmitt trigger has first and second values, wherein the output of the Schmitt trigger is the first value for the first relaxation time and the output of the Schmitt trigger is the second value for a second relaxation time, and wherein the sum of the first relaxation time and the second relaxation time is proportional to the first capacitance.

20. The circuit of claim 19 wherein the Schmitt trigger includes a comparator having a positive input and a negative input and an output, wherein the input of the Schmitt trigger is the negative input, the Schmitt trigger further including a first resistor connected in series between the output and the positive input and a second resistor connected between the positive input and the voltage reference point, wherein the first and second resistors are selected to provide the first and second threshold values corresponding to the first and second output levels respectively.

21. The circuit of claim 17 wherein the first amplifier includes an operational amplifier configured as a non-inverting unity gain amplifier.

22. The circuit of claim 21 wherein the first amplifier includes an operational amplifier and first and second resistors configured as a non-inverting amplifier in which the first and second resistors provide feedback form the output of the operational amplifier and the negative input, the non-inverting amplifier further including a feedback capacitor coupled between the output of the operational amplifier and the positive input.

23. The circuit of claim 22 further including a guard electrode coaxially surrounding the fixed resistor and proximate thereto, the guard being electrically coupled to the output of the first amplifier.

24. The circuit of claim 23 wherein the guard electrode further surrounds the input of the first amplifier.

25. A system for sensing the value of the mutual capacitance between a sensor capacitor and a target, the circuit comprising:

a sensing capacitor having a sensing capacitance value, the sensing capacitor having first and second terminals, the second terminal coupled to a voltage reference point;

a first amplifier having an input and an output, the input connected to the first terminal of the sensing capacitor, the amplifier providing an output signal that is proportional to the input signal;

a relaxation oscillator coupled to the first amplifier and receiving the output signal therefrom, the relaxation oscillator including the sensing capacitor and the first amplifier, the relaxation oscillator having an output including first and second values, wherein the output of the relaxation oscillator is the first value for a first relaxation time and the output of the relaxation oscillator is the second value for a second relaxation time, and wherein the sum of the first relaxation time and the second relaxation time is proportional to the sensing capacitance value;

a fixed resistor connected in series between the output of the relation oscillator and the first terminal of the sensing capacitor, wherein the first and second relaxation times are a function of the capacitance of the sensor capacitor and the resistance of the fixed resistor;

a resistance multiplying circuit of configured and arranged to multiply the value of the fixed resistor by a predetermined constant;

a timing module coupled to the relaxation oscillator and configured and arranged to measure the first and second relaxation times and to provide a total relaxation time that is the sum of the first and second relaxation times;

a calculation module coupled to the timing module and configured and arranged to calculate the first capacitance by multiplying the total relaxation time by a predetermined constant.

26. The circuit of claim 25 wherein the resistance multiplying circuit includes the first amplifier including an operational amplifier configured and arranged as a unity gain amplifier having an output and an input, the multiplying circuit further including first and second resistors coupled in series between the output of the relaxation oscillator and the output of the operational amplifier, the fixed resistor coupled to the series connection between the first and second resistors.

27. The circuit of claim 25 wherein the relaxation oscillator includes:

a Schmitt trigger having an input coupled to the output of the first amplifier and receiving the output signal therefrom as an input signal, the Schmitt trigger having first and second threshold values defining a hysteresis input to the Schmitt trigger, the Schmitt trigger configured and arranged to switch an output signal between the first and second output values as a function of the input signal and the first and second threshold values, wherein the output is the first output level when the input exceeds the second threshold level, in a positive sense, and the output is the second output level when the input exceeds the first threshold level, in a negative sense, and wherein the Schmitt trigger maintains the previous output when the input is between the first and second thresholds;

wherein the fixed resistor is connected in series between the output of the Schmitt trigger and the first terminal of the sensing capacitor, wherein the first and second relaxation times are a function of the capacitance of the sensor capacitor and the resistance of the fixed resistor;

whereby the output signal of the Schmitt trigger has first and second values, wherein the output of the Schmitt trigger is the first value for the first relaxation time and the output of the Schmitt trigger is the second value for a second relaxation time, and wherein the sum of the first relaxation time and the second relaxation time is proportional to the first capacitance.

28. The circuit of claim 27 wherein the Schmitt trigger includes a comparator having a positive input and a negative input and an output, wherein the input of the Schmitt trigger is the negative input, the Schmitt trigger further including a first resistor connected in series between the output and the positive input and a second resistor connected between the positive input and the voltage reference point, wherein the first and second resistors are selected to provide the first and second threshold values corresponding to the first and second output levels respectively.

29. The circuit of claim 25 wherein the first amplifier includes an operational amplifier configured as a non-inverting unity gain amplifier.

30. The circuit of claim 29 wherein the first amplifier includes an operational amplifier and first and second resistors configured as a non-inverting amplifier in which the first and second resistors provide feedback form the output of the operational amplifier and the negative input, the non-inverting amplifier further including a feedback capacitor coupled between the output of the operational amplifier and the positive input.

31. The circuit of claim 30 further including a guard electrode coaxially surrounding the fixed resistor and proximate thereto, the guard being electrically coupled to the output of the first amplifier.

32. The circuit of claim wherein the guard electrode further surrounds the input of the first amplifier.