Integrated circuit inductors

• US 6,701,607 B2
• Filed: 03/19/2002
• Issued: 03/09/2004
• Est. Priority Date: 07/09/1999
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ahn, Kie Y., Forbes, Leonard
• Primary Examiner(s): Nguyen, Viet Q.
• Application Number:
  US10/102,070
• Publication Number:
  US 20020095777A1
• Time in Patent Office: 721 Days
• Field of Search: 296/04, 296/05, 296/06, 299/07, 296/031, 257/528, 257/531, 257/421
• US Class Current: 29/604
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01F 27/2804 Printed windings
• CPC Class Codes: H01F 37/00 Fixed inductances not covered by group H01F17/00
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: Y10S 257/924 with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap
• CPC Class Codes: Y10T 29/4902 Electromagnet, transformer or inductor
• CPC Class Codes: Y10T 29/49037 Using reference point/surface to facilitate measuring
• CPC Class Codes: Y10T 29/49069 Data storage inductor or core
• CPC Class Codes: Y10T 29/49071 by winding or coiling
• CPC Class Codes: Y10T 29/49073 by assembling coil and core
• CPC Class Codes: Y10T 29/49075 including permanent magnet or core

Abstract

The invention relates to an inductor comprising a plurality of interconnected conductive segments interwoven with a substrate. The inductance of the inductor is increased through the use of coatings and films of ferromagnetic materials such as magnetic metals, alloys, and oxides. The inductor is compatible with integrated circuit manufacturing techniques and eliminates the need in many systems and circuits for large off chip inductors. A sense and measurement coil, which is fabricated on the same substrate as the inductor, provides the capability to measure the magnetic field or flux produced by the inductor. This on chip measurement capability supplies information that permits circuit engineers to design and fabricate on chip inductors to very tight tolerances.

Claims

1. A memory system comprising:

a substrate having a plurality of holes and a plurality of memory circuits;

a magnetic film formed on the substrate; and

a conductive path interwoven with the substrate and the magnetic film by routing the conductive path through the plurality of holes.

5. The memory system of claim 1, including an insulating layer atop the magnetic film.

6. The memory system of claim 1, wherein the magnetic film comprises a magnetic oxide.

7. The memory system of claim 1, wherein the magnetic film comprises a nickel iron alloy.

2. A computer system comprising:

a processor;

an inductive element comprising;

a substrate having a pair of rows of a plurality of substantially parallel perforations;

a magnetic film on the substrate; and

a conductive path interlaced with the substrate through the plurality of substantially parallel perforations; and

an electronic device coupled to the inductive element and the processor.

8. The computer system of claim 2, wherein the magnetic film comprises a magnetic oxide.

9. The computer system of claim 2, wherein the magnetic film comprises a nickel iron alloy.

10. The computer system of claim 2, wherein the conductive path comprises planar metal segments that traverse the magnetic film.

11. The computer system of claim 2, wherein the electronic device includes a memory array.

12. The computer system of claim 11, wherein the memory array is coupled to the processor via an address bus, a data bus and a control bus.

3. A computer system comprising:

a processor;

an inductor comprising;

a substrate;

a magnetic film on the substrate; and

a conductive path operable for creating a reinforcing magnetic field within the magnetic film and within the substrate; and

an electronic circuit operably coupled to the processor and the inductor.

13. The computer system of claim 3, wherein the magnetic film comprises a magnetic oxide.

14. The computer system of claim 3, wherein the magnetic film comprises a nickel iron alloy.

15. The computer system of claim 3, wherein the conductive path comprises planar metal segments that traverse the magnetic film.

16. The computer system of claim 3, wherein the electronic device includes a memory array.

17. The computer system of claim 16, wherein the memory array is coupled to the processor via an address bus, a data bus and a control bus.

18. The computer system of claim 17, further including address circuitry coupled to the memory array and the address bus, the data bus and the control bus.

4. An computer system comprising:

a processor;

an inductor comprising;

a substrate;

a magnetic film on the substrate; and

a conductive path interwoven with the substrate and operable for creating a magnetic field in the magnetic film; and

a power supply circuit coupled to the inductor and the processor.

19. The computer system of claim 4, wherein the magnetic film comprises a magnetic oxide.

20. The computer system of claim 4, wherein the magnetic film comprises a nickel iron alloy.

21. The computer system of claim 4, wherein the conductive path comprises metal segments that traverse the magnetic film.

22. The computer system of claim 4, further including a memory array coupled to the power supply circuit and the processor.

23. The computer system of claim 22, wherein the memory array is coupled to the processor via an address bus, a data bus and a control bus.

24. The computer system of claim 23, further including address circuitry coupled to the memory array and the address bus, the data bus and the control bus.

25. A computer system comprising:

a processor;

an inductor coupled to the processor, the inductor comprising;

a substrate with a plurality of perforations passing through the substrate;

a magnetic film atop a surface of the substrate;

a conductive path traversing the magnetic film and passing through the substrate through the plurality of perforations; and

a memory array coupled to the inductor and the processor.

26. The computer system of claim 25, wherein the magnetic film comprises a magnetic oxide.

27. The computer system of claim 25, wherein the magnetic film comprises a nickel iron alloy.

28. The computer system of claim 25, wherein the conductive path comprises metal segments that traverse the magnetic film.

29. The computer system of claim 28, wherein the memory array is coupled to the processor via an address bus, a data bus and a control bus.

30. The computer system of claim 29, further including address circuitry coupled to the memory array and the address bus, the data bus and the control bus.

31. A computer system comprising:

a processor;

a memory array connected to the processor via a plurality of busses;

an inductor formed integral with a semiconductor substrate and operatively coupled to the processor and the memory array, the inductor comprising;

a conductive coil interwoven with a portion of the substrate;

a magnetic film formed atop the portion of the substrate and traversed by segments of the conductive coil.

32. The computer system of claim 31, wherein the plurality of busses includes an address bus, a data bus and a control bus.

33. The computer system of claim 32, further including address circuitry coupled to the memory array and the address bus, the data bus and the control bus.

34. A computer system comprising:

a processor;

an inductor coupled to the processor, the inductor comprising;

a substrate having first and second opposing surfaces;

a magnetic film formed atop a portion of the first substrate surface;

first conductive segments passing through the substrate;

second conductive segments connected to the first conductive segments and

passing over the portion of the first substrate surface and a portion of the second substrate surface to form a contiguous conductive path operable to create a magnetic field in the magnetic film; and

an electronic circuit connected to the inductor and the processor.

35. The computer system of claim 34, wherein the electronic circuit includes a memory array.

36. The computer system of claim 35, wherein the memory array is coupled to the processor via a plurality of busses.

37. The computer system of claim 36, wherein the plurality of busses includes an address bus, a data bus and a control bus.

38. The computer system of claim 37, further including address circuitry coupled to the memory array and the address bus, the data bus and the control bus.