High pressure anneal process for integrated circuits

• US 6,703,325 B1
• Filed: 08/31/2000
• Issued: 03/09/2004
• Est. Priority Date: 01/22/1996
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Lane, Richard H., Wald, Phillip G.
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): MALSAWMA, LALRINFAMKIM HMAR
• Application Number:
  US09/654,030
• Time in Patent Office: 1,286 Days
• Field of Search: 438/787, 438/791, 438/663, 438/492, 438/378, 438/660, 438/795, 438/904, 257/640, 257/649
• US Class Current: 438/795
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/28176 with a treatment, e.g. annealing, after the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: Y10S 438/904 Charge carrier lifetime control
• CPC Class Codes: Y10S 438/908 Utilizing cluster apparatus

Abstract

This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of the chamber reduces the contribution made by the final anneal step to total thermal exposure by increasing the diffusion rate of the hydrogen into the materials from which the integrated circuit is fabricated. Ideally, the forming gas contains, in addition to hydrogen, at least one other gas such as nitrogen or argon that will not react with hydrogen and, thus, reduce the danger of explosion. However, the integrated circuit may be annealed in an ambiance containing only hydrogen gas that is maintained at a pressure greater than ambient atmospheric pressure.

Claims

1. A method of fabricating circuitry having at least a portion thereof including a metallization formed of one of a metal and a metal alloy, the method for repairing fabrication-induced damage to at least a portion of at least one integrated circuit of the circuitry, the method comprising:

subjecting the circuitry to a semiconductor process;

placing the circuitry within an annealing chamber;

introducing a forming gas comprising hydrogen into the annealing chamber; and

performing a pressurized anneal during a final annealing process for the circuitry at a temperature no greater than substantially 80 percent of a melting point of the one of a metal and metal alloy forming the metallization without any further heating for annealing of the circuitry after the final annealing process.

2. The method in claim 1, wherein subjecting the circuitry to the semiconductor process comprises providing a moisture barrier on the circuitry.

3. The method in claim 2, wherein providing a moisture barrier on the circuitry comprises forming silicon nitride on the circuitry.

4. The method in claim 3, wherein placing the circuitry within an annealing chamber comprises performing placing before subjecting the circuitry to a semiconductor process.

5. The method in claim 3, wherein performing a pressurized anneal comprises performing the pressurized anneal after subjecting the circuitry to a semiconductor process.

6. The method in claim 5, wherein forming silicon nitride comprises forming a silicon nitride gate structure.

7. The method in claim 1, wherein forming gas also comprises at least one inert gas.

8. The method in claim 7, wherein the at least one inert gas is selected from the group consisting of nitrogen, helium, neon, and argon.

9. A method of manufacturing an integrated circuit having at least a portion thereof including a metallization formed of one of a metal and a metal alloy, the method of manufacturing for repairing induced damage to at least a portion of at least one integrated circuit, the method comprising:

providing a silicon-containing layer serving as a first part of the integrated circuit;

covering at least a portion of the silicon-containing layer with a material serving as a second part of the integrated circuit;

introducing a forming gas during a final annealing process for the integrated circuit without any further annealing of the integrated circuit, forming gas comprising hydrogen to the integrated circuit, wherein forming gas is configured to have a first diffusion rate through the material, the first diffusion rate determined at least in part by a first temperature of the material, the first temperature being temperature no greater than substantially 80 percent of a melting point of the one of a metal and metal alloy forming the metallization; and

establishing a second diffusion rate for forming gas through the material during a final annealing process for the integrated circuit without any further annealing of the integrated circuit while maintaining the material at the first temperature, the second diffusion rate is greater than the first diffusion rate.

10. The method in claim 9, wherein:

introducing the forming gas comprises introducing a forming gas configured to have a first diffusion rate determined at least in part by a first pressure exertable on forming gas; and

establishing the second diffusion rate comprises exerting a second pressure on forming gas, wherein the second pressure is greater than the first pressure.

11. The method in claim 10, wherein covering at least a portion of the silicon-containing layer with the material comprises covering the portion with a material that is generally impermeable to diatomic hydrogen at the first pressure.

12. The method in claim 11, wherein covering at least a portion of the silicon-containing layer comprises covering the portion with silicon nitride.

13. The method in claim 9, wherein forming gas also comprises at least one inert gas.

14. The method in claim 13, wherein the at least one inert gas is selected from the group consisting of nitrogen, helium, neon, and argon.