Dual damascene metal trace with reduced RF impedance resulting from the skin effect

• US 6,703,710 B1
• Filed: 08/15/2002
• Issued: 03/09/2004
• Est. Priority Date: 08/15/2002
• Status: Expired due to Fees

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Hwang, Kyuwoon, Drury, Robert, Mian, Michael, Johnson, Peter, Hopper, Peter J.
• Primary Examiner(s): CLARK, JASMINE JHIHAN B
• Application Number:
  US10/219,791
• Time in Patent Office: 572 Days
• Field of Search: 257/774, 257/750, 257/758
• US Class Current: 257/758
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/5283 Cross-sectional geometry
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

The RF impedance of a metal trace at gigahertz frequencies is reduced by forming the metal trace to have a base region and a number of fingers that extend away from the base region. When formed to have a number of loops, the metal trace forms an inductor with an increased Q.

Claims

1. A semiconductor device comprising:

a layer of insulation material formed over a semiconductor substrate; and

a metal trace formed in the layer of insulation material, the metal trace having a base region and a plurality of spaced-apart fingers that extend away from the base region, the fingers extending away from a bottom surface of the base region.

2. The semiconductor device of claim 1 wherein the metal trace has a first end electrically connected to a first circuit, and a second end electrically connected to a second circuit, the metal trace passing a gigahertz-frequency signal from the first circuit to the second circuit.

3. The semiconductor device of claim 2 wherein the metal trace lies substantially in a plane horizontal to a surface of the substrate.

4. The semiconductor device of claim 2 wherein the metal trace is connected to a contact.

5. The semiconductor device of claim 2 wherein the metal trace is connected to a via.

6. The semiconductor device of claim 1 wherein the metal trace forms a number of loops.

7. The semiconductor device of claim 6 wherein the loops lie substantially in a same plane.

8. The semiconductor device of claim 6 wherein the metal trace has a first end and a second end.

9. The semiconductor device of claim 8 wherein the second end is connected to a contact.

10. The semiconductor device of claim 8 wherein the second end is connected to a via.

11. The semiconductor device of claim 10 wherein the via lies under the metal trace.

12. The semiconductor device of claim 6 wherein the fingers extend away from a bottom surface of the base region.

13. A semiconductor device comprising:

a layer of insulation material formed over a semiconductor substrate; and

metal trace formed in the layer of insulation material, the metal trace having a width, a length that is substantially greater than the width, and a plurality of spaced-apart fingers that extend away from a bottom side of the metal trace and run from a first end of the metal trace to a second end of the metal trace along the length, a top surface of the metal trace and a top surface of the insulation material lying in a same horizontal plane.

14. The semiconductor device of claim 13 wherein the metal trace forms a number of loops.

15. The semiconductor device of claim 14 wherein the loops lie substantially in a same plane.

16. The semiconductor device of claim 13 wherein the second end is connected to a via.

17. The semiconductor device of claim 16 and further comprising a trace segment that makes an electrical connection with the via, and lies lower than the metal trace.

18. The semiconductor device of claim 17 wherein the metal trace segment has a plurality of fingers that extent away from a bottom surface of the metal trace segment.

19. The semiconductor device of claim 17 wherein the metal trace segment has a width, a length that is substanially greater than the width, and a plurality of fingers that extend away from a bottom surface of the metal trace segment and run from end to a second end of the metal trace segment along the length.

20. The semiconductor device of claim 13, wherein the fingers run continuously from the first end to the second end.