Active matrix substrate and manufacturing method thereof

• US 6,707,513 B2
• Filed: 07/06/2001
• Issued: 03/16/2004
• Est. Priority Date: 07/10/2000
• Status: Active Grant

• Current Assignee: AU Optronics Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Tokuhiro, Osamu, Tsujimura, Takatoshi, Morooka, Mitsuo, Miwa, Kohichi
• Primary Examiner(s): Ton, Toan
• Assistant Examiner(s): DUONG, TAI V
• Application Number:
  US09/682,002
• Publication Number:
  US 20020003587A1
• Time in Patent Office: 984 Days
• Field of Search: 349/42, 349/43, 349/46, 349/47, 349/147, 349/148, 257/59, 257/72
• US Class Current: 349/47
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/123 pixel

Abstract

An active matrix substrate includes a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, which are sequentially deposited on an insulating substrate. A transparent conductive layer is deposited on the source and drain electrodes so that the transparent conductive layer includes a portion deposited to be substantially the same pattern as those of the source and drain electrodes. The transparent conductive layer is connected to either the source electrode or the drain electrode to form a pixel electrode. A gate line is further included on which the gate insulating film is deposited. The gate line is to be connected to the gate electrode.

Claims

1. An active matrix substrate comprising:

a source electrode and a drain electrode which are provided on an insulating substrate and spaced apart from each other;

a semiconductor layer deposited on said source electrode and said drain electrode;

a gate insulating film deposited on said semiconductor layer;

a gate electrode deposited on said gate insulating film; and

a transparent conductive layer having first and second portions, the first portion being deposited on said gate electrode so as to be substantially the same pattern as that of said gate electrode, and the second portion including a portion deposited on a part of either said source electrode or said drain electrode.

2. The active matrix substrate according to claim 1,

said active matrix substrate further comprising:

a data line connected to either said source electrode or said drain electrode,

wherein another portion of said gate insulating film is deposited on said data line.

3. The active matrix substrate according to claim 1, wherein the second portion of said transparent conductive layer constitutes a pixel electrode so as to be connected to either maid source electrode or said drain electrode.

4. A display device comprising:

an active matrix substrate including;

a source electrode, and a drain electrode which are provided on an insulating substrate and spaced apart from each other;

a semiconductor layer deposited on said source electrode and said drain electrode;

a gate insulating film deposited on said semiconductor layer;

a gate electrode deposited on said gate insulating film; and

a transparent conductive layer having first and second portions, the first portion being deposited on said gate electrode so as to be substantially the same pattern as that of said gate electrode, and the second portion including a portion deposited on a part of either said source electrode or said drain electrode.

5. The display device according to claim 4, further comprising:

a liquid crystal layer filled by the use of said insulating substrate.

6. The display device of claim 4, further comprising:

a pixel electrode formed to be connected to one of the source electrode or the drain electrode of said thin film transistor structure;

a data line formed to be connected to the other of the source electrode or the drain electrode of said thin Lila transistor structure; and

a gate line formed to be connected to said gate electrode.

7. The display device of claim 6, wherein:

an upper surface of an upper electrode among said source, drain and gate electrodes of said thin film transistor structure is covered with said transparent conductive layer, and an upper surface of either said data line or said gate line is covered with said gate insulating film.