Heat sink for chip stacking applications

• US 6,707,673 B2
• Filed: 07/29/2002
• Issued: 03/16/2004
• Est. Priority Date: 10/26/1998
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Bissey, L. Jan, Duesman, Kevin G.
• Primary Examiner(s): TOLIN, GERALD P
• Application Number:
  US10/206,043
• Publication Number:
  US 20020186539A1
• Time in Patent Office: 596 Days
• Field of Search: 165/80.3, 165/185, 174/16.3, 257/722-724, 363/141, 435/106, 435/121, 435/122, 298/900.3, 361/695, 361/697, 361/703, 361/704, 361/707, 361/710, 361/717-719, 361/722
• US Class Current: 361/704
• CPC Class Codes: H01L 23/3672 Foil-like cooling fins or heat sinks being part of lead-frames H01L23/49568
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A heat sink is provided for use with stacks of integrated chips. The heat sink includes a thermally conductive body having a heat absorbing section which is inserted within the chip stack, and heat transfer and dissipating sections which are located outside of the chip stack.

Claims

1. A memory module comprising:

a heat sink in contact with a plurality of stacks of integrated circuits, said heat sink comprising;

a first flat portion interposed between a plurality of stacks of integrated circuits, said first flat portion being comprised of a plurality of flat coplanar elements extending in the same direction wherein each element is interposed between a respective upper and lower integrated circuit forming an integrated circuit stack; and

a second portion connected to said first portion for dissipating heat.

2. The memory module of claim 1, wherein said second portion includes a plurality of outwardly extended fins configured to remove heat from said heat sink.

3. The memory module of claim 1, wherein said second portion contains areas of corrugation.

4. The memory module of claim 1, wherein said heat sink is comprised of a thermally conductive material and is in contact with a surface of at least one of said stacked integrated circuits, said thermally conductive material having a thermal rate of expansion approximately equal to the thermal expansion rate of said at least one stacked integrated circuit.

5. The memory module of claim 1, wherein said first portion is comprised of a plurality of rectangular elements.

6. The memory module of claim 1, wherein said heat sink is substantially flat.

7. The memory module of claim 1, wherein said heat sink is not substantially flat.

8. The memory module of claim 1, wherein said heat sink is configured so that at least said second portion of said heat sink is located outside said stack of integrated circuits.

9. The memory module of claim 1, wherein said heat sink is configured so that in use at least of portion of said heat sink is located within said stacked integrated circuits.

10. An electronic system comprising a printed circuit board mounting a plurality of stacks of integrated circuits and a heat sink for said stacks of integrated circuits, wherein said heat sink comprises a first flat portion having a plurality of coplanar elements extending in the same direction each interposed between an upper and lower stack of integrated circuits forming an integrated circuit stack and a second portion connected to said first portion for dissipating heat.

11. The system of claim 10, wherein said second portion includes a plurality of outwardly extended fins configured to remove heat from said heat sink.

12. The system of claim 10, wherein said second portion contains areas of corrugation.

13. The system of claim 10, wherein said heat sink is comprised of a thermally conductive material and is in contact with said stack of integrated circuits, said thermally conductive material having a thermal rate of expansion approximately equal to a thermal expansion rare of integrated circuits of said stack of integrated circuits.

14. The system of claim 10, wherein said first portion is comprised of a plurality of rectangular elements.

15. The system of claim 10, wherein said heat sink is substantially flat.

16. The system of claim 10, wherein said heat sink is not substantially flat.

17. The system of claim 10, wherein said heat sink is configured so that at least said second portion of said heat sink is located outside said stack of integrated circuits.

18. The system of claim 10, wherein said heat sink is configured so that in use at least of portion of said heat sink is located within said stacked integrated circuits.