System and method for operating a system with redundant peripheral bus controllers

• US 6,708,283 B1
• Filed: 04/13/2000
• Issued: 03/16/2004
• Est. Priority Date: 04/13/2000
• Status: Expired due to Term

• Current Assignee: Stratus Technologies Ireland Ltd. (Stratus Technologies Bermuda Holdings Ltd.)
• Original Assignee: Stratus Technologies Bermuda Ltd. (Stratus Technologies Bermuda Holdings Ltd.)
• Inventors: Nelvin, Robert E., Tetreault, Mark D., Alden, Andrew, Dolaty, Mohsen, Edwards, Jr., John W., Kement, Michael W., MacLeod, John R.
• Primary Examiner(s): BADERMAN, SCOTT T
• Application Number:
  US09/548,200
• Time in Patent Office: 1,433 Days
• Field of Search: 714/5, 714/43, 714/44, 714/56, 710/312, 710/313, 710/314, 710/315, 710/316, 710/302, 710/304
• US Class Current: 714/5.11
• CPC Class Codes: G06F 11/2005 using redundant communication controllers
• CPC Class Codes: G06F 11/2007 using redundant communication media

Abstract

The inventive system essentially hides redundant paths to the peripheral devices from the operating system, by reporting a single “virtual” path to the peripheral busses over PCI bus 0. The virtual path includes at least a virtual peripheral bus controller and a virtual video controller. The system also tells the operating system that the real controllers are on another PCI bus on an opposite side of a PCI-to-PCI bridge connected also to PCI bus 0. An I/O system manager selects one of the actual paths, which may, but need not, be connected to PCI bus 0, to handle communications with the peripheral devices. The I/O system manager maintains the controllers on the unselected path in an off-line or standby mode, in case of a failure of one or more of the controllers on the selected path. If a failure occurs, the I/O system manager performs a fail-over operation to change the selection of controllers, and the peripheral devices continue to operate in the same manner on the peripheral busses. The operating system does not respond to the controller failure by declaring a system failure, however, because the operating system continues to look to the virtual path, with its virtual controllers, as a valid path to the peripheral devices. The system also allows hot swapping of PCI bridges, through FET isolation of the unselected controllers. The devices on the PCI bus and the peripheral busses may also be hot swapped through selective FET isolation.

Claims

1. A computer system including:

A. one or more system components connected to a first bus;

B. redundant sets of one or more controllers that connect to redundant second busses and allow communications between the first bus and the second busses;

C. one or more functions for presenting to a computer operating system a communication path from the first bus to one of the second busses through a set of one or more virtual controllers, and

D. an I/O subsystem manager for redirecting to a selected set of the one or more controllers the communications that are directed through the virtual controllers.

2. The computer system of claim 1 wherein the I/O subsystem manager changes the selection of the set of one or more controllers from a previously selected set when one or more of the controllers in the previously selected set fails.

3. The computer system of claim 2 wherein each second bus connects at one end to one set of one or more controllers and at a second end to one or more peripheral devices.

4. The computer system of claim 3 further including switches for connection to the second busses at ends associated with the peripheral devices, the switches being directed by the I/O subsystem manager to select the second bus associated with the selected set of controllers.

5. The computer system of claim 4 wherein the sets of one or more controllers include peripheral bus controllers, video controllers or both.

6. The computer system of claim 1 wherein the system components connect to redundant first busses.

7. The computer system of claim 6 wherein the system components are central processing units.

8. The computer system of claim 6 wherein the I/O system manager controls the selection of the set of one or more controllers for interconnecting the first busses and the second bus associated with the selected set of controllers.

9. The computer system of claim 8 wherein the I/O subsystem manager changes the selection of the set of one or more controllers from a previously selected set when one or more of the controllers in the previously selected set fails.

10. The computer system of claim 9 further including switches for connection to the second busses at ends associated with the peripheral devices, the switches being directed by the I/O subsystem manager to select the second bus associated with the selected set of controllers.

11. The computer system of claim 1 further comprising

E. a bridge electrically interconnecting separate portions of the first bus;

F. one or more connection slots connecting to the first bus on one side of the bridge for providing plug-in connectors for connecting devices to the first bus;

G. field effect transistors (FETS) connecting between the first bus and the devices plugged into the connection slots; and

H. a hot plug controller for selectively controlling the FETS, to electrically isolate a selected device from the first PCI bus.

12. The computer system of claim 11 wherein the hot plug controller further

i. resets the slot containing the isolated device, and

ii. turns power off to the slot, to allow the device to be removed.

13. The computer system of claim 12 wherein the hot plug controller further

iii. again resets the slot when a new device is plugged into the slot,

iv. powers the slot to reset power to the device, and

v. controls the FET to connect the device to the first bus.

14. The computer system of claim 13 further including an I/O system manager for controlling the hot plug of a board that is one side of the bridge, the controller

a. setting an I/O broken signal to end communications over the bridge;

b. resetting the devices on the board and turning power to the board off;

c. de-asserting a board present signal when the board is removed from the system;

d. asserting the board present signal when a new board is plugged into the system;

e. asserting a reset signal and resetting clocks and logic levels on devices on the new board;

f. deasserting the reset signal when the clocks and logic have reached stable levels; and

g. deasserting the I/O broken signal a predetermined time after the reset signal is deasserted.

15. The computer system of claim 14 further including

E. a front panel that connects the peripheral devices to one end of peripheral busses which at a second end connect to one side of the bridge;

F. FETs that control a connector between the front panel devices and the peripheral bus, the FETs controlling power to the front panel and the peripheral devices; and

G. a handle for locking the front panel to the system and controlling the FETS, the handle in an open position disabling the FETs and unlocking the front panel to allow the removal of the front panel from the system, and in a closed position locking the front panel to the system and enabling the FETs to provide power to the front panel and the peripheral devices.

16. A method of operating a computer system including the steps of:

A. presenting to a computer operating system a communication path from a first bus to a second bus through a set of one or more virtual controllers, and

B. redirecting to a selected set of one or more controllers communications that are directed through the virtual controllers.

17. The method of claim 16 wherein the method further includes the step of changing the selection of the set of one or more controllers from a previously selected set when one or more of the controllers in the previously selected set fails.

18. The method of claim 17 wherein the sets of one or more controllers connect to redundant second busses.

19. The method of claim 18 wherein the second busses connect also to peripheral devices.

20. The method of claim 19 further including the step of selecting at the peripheral devices the second bus associated with the selected set of controllers.

21. The method of claim 20 wherein the sets of one or more controllers include peripheral bus controllers, video controllers or both.