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Reference timing signal oscillator with frequency stability

  • US 6,711,230 B1
  • Filed: 09/27/2002
  • Issued: 03/23/2004
  • Est. Priority Date: 09/27/2002
  • Status: Active Grant
First Claim
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1. A phase-locked loop (PLL) for providing a timing output signal, the PLL comprising:

  • an oscillator for generating an oscillation output signal in response to a control component of an input control signal;

    a difference detector for detecting a difference between the oscillation output signal and an input reference timing signal when the input reference timing signal is available, thereby providing a difference signal; and

    a processor for varying the control component of the input control signal applied to the oscillator in accordance with the difference detected by the difference detector and a frequency dependent element relating to the oscillator, the frequency dependent element being provided in accordance with a characteristic model that is updateable in accordance with the difference signal provided by the difference detector when the input reference timing signal is available, a frequency of the oscillation output signal generated by the oscillator being controlled in accordance with the varied control component of the input control signal.

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