Compresses video decompression system with encryption of compressed data stored in video buffer

• US 6,711,683 B1
• Filed: 05/19/1999
• Issued: 03/23/2004
• Est. Priority Date: 05/29/1998
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Ferguson, Edward, Laczko, Frank L. Sr.
• Primary Examiner(s): Wright, Norman M.
• Application Number:
  US09/314,287
• Time in Patent Office: 1,770 Days
• Field of Search: 713/170, 713/169, 713/186, 713/168, 713/167, 713/178, 713/189, 713/193, 713/182, 902/2, 902/3, 902/4, 902/5, 902/8
• US Class Current: 713/189
• CPC Class Codes: G06F 21/10 Protecting distributed programs or content, e.g. vending or licensing of copyrighted material protection in video systems or pay television H04N7/16 ; Digital rights management [DRM]
• CPC Class Codes: G06F 21/85 interconnection devices, e.g. bus-connected or in-line devices
• CPC Class Codes: H04N 21/426 Internal components of the client ; Characteristics thereof H04N5/44 takes precedence
• CPC Class Codes: H04N 21/4367 Establishing a secure communication between the client and a peripheral device or smart card

Abstract

A secure computing system prevents unauthorized use of compressed video data stored in a first-in-first-out memory buffer in a set top box. A single integrated circuit includes a data processor and a chip identity read only register storing a unique chip identity number fixed during manufacture. The data processor encrypts the compressed video data stream using the chip identity number as an encryption key. This encrypted data is stored in and recalled from a FIFO buffer. The data processor then decrypts the recalled data employing at least a part of the chip identity number as the decryption key. Using technique the compressed video data stream temporarily stored in compressed form in the FIFO buffer can only be employed by the particular data processor having the unique chip identity number.

Claims

1. A secure computing system comprising:

a data processor disposed on a single integrated circuit, said data processor including a read only memory storing a decryption key, and a chip identity read only register storing a unique chip identity number accessible by said data processor;

a memory bidirectionally coupled to said data processor and storing data;

said data processor being programmed to;

receive encrypted and compressed data,

decrypt said encrypted and compressed data employing said decryption key stored in said read only memory,

employ said memory as a first-in-first-out buffer including

encrypting said decrypted data employing at least a part of said chip identity number as encryption key,

storing said encrypted data in said memory,

recalling said stored data from said memory, and

decrypting said recalled data employing at least a part of said chip identity number as decryption key,

decompress said decrypted data recalled from said memory, and

output decompressed data.

2. The secure computing system of claim 1, wherein:

said chip identity read only register includes a plurality of bits, each bit capable of selective fixation by laser; and

said unique chip identity number being fixed in manufacture by laser probing corresponding bits of said chip identity read only register.

3. The secure computing system of claim 1, wherein:

said chip identity read only register includes a plurality of fuse links, each fuse link capable of selective activation; and

said unique chip identity number being fixed in manufacture by selective activation of a subset of said plurality of fuse links of said chip identity read only register.

4. The secure computing system of claim 1, wherein:

said chip identity read only register includes a plurality of antifuse links, each antifuse link capable of selective activation; and

said unique chip identity number being fixed in manufacture by selective activation of a subset of said plurality of antifuse links of said chip identity read only register.

5. The secure computing system of claim 1, wherein:

said encrypted and compressed data is a stream of video data.

6. A method of secure computing comprising the steps of:

disposing on a single integrated circuit a data processor, a read only memory storing a decryption key, and a chip identity read only register;

storing a unique chip identity number accessible by said data processor in said chip identity read only register;

receiving encrypted and compressed data;

employing said data processor to decrypt said encrypted and compressed data employing said encryption key stored in said read only memory;

employing a memory as a first-in-first-out buffer for said data processor including

encrypting said decrypted data with said data processor employing at least a part of said chip identity number as an encryption key;

storing said encrypted data in a memory;

recalling said stored data from said memory;

decrypting said recalled data with said data processor employing at least a part of said chip identity number as a decryption key;

employing said data processor to decompress said decrypted data recalled from said memory; and

outputting said decompressed data from said data processor.

7. The method of secure computing of claim 6, wherein:

said step of storing said unique read only chip identity number in said chip identity read only register includes

constructing said chip identity read only register as a plurality of bits, each bit capable of selective fixation by laser, and

laser probing selected bits of said chip identity read only register.

8. The method of secure computing of claim 6, wherein:

said step of storing said unique read only chip identity number in said chip identity read only register includes

constructing said chip identity read only register as a plurality of fuse links, each fuse link capable of selective activation, and

selective activation of a subset of said plurality of fuse links of a chip identity read only register.

9. The method of secure computing of claim 6, wherein:

said step of storing said unique read only chip identity number in said chip identity read only register includes

constructing said chip identity read only register as a plurality of antifuse links, each antifuse link capable or selective activation, and

selective activation of a subset of said plurality of antifuse links of a chip identity read only register.

10. The method of secure computing of claim 6, wherein:

said encrypted and compressed data is a stream of video data.